soc: use new location of gpio module

soc/targets/artiq_kc705.py

@@ -3,7 +3,7 @@ from migen.bank.description import *
 from migen.bank import wbgen
 from mibuild.generic_platform import *
 
-from misoclib.cpu.peripherals import gpio
+from misoclib.com import gpio
 from misoclib.soc import mem_decoder
 from targets.kc705 import BaseSoC
 

soc/targets/artiq_pipistrello.py

@@ -3,7 +3,7 @@ from migen.bank.description import *
 from migen.bank import wbgen
 from mibuild.generic_platform import *
 
-from misoclib.cpu.peripherals import gpio
+from misoclib.com import gpio
 from targets.pipistrello import BaseSoC
 
 from artiq.gateware import rtio, ad9858

soc/targets/artiq_ppro.py

@@ -3,7 +3,7 @@ from migen.bank.description import *
 from migen.bank import wbgen
 from mibuild.generic_platform import *
 
-from misoclib.cpu.peripherals import gpio
+from misoclib.com import gpio
 from misoclib.mem.sdram.core.minicon import MiniconSettings
 from targets.ppro import BaseSoC