mirror of
https://github.com/m-labs/artiq.git
synced 2024-12-29 05:03:34 +08:00
drtio: remove outdated comment
This commit is contained in:
parent
c0100ebc56
commit
83d87b5805
@ -156,7 +156,6 @@ class RTController(Module):
|
||||
timeout_counter = WaitTimer(8191)
|
||||
self.submodules += timeout_counter
|
||||
|
||||
# TODO: collision, replace, busy
|
||||
cond_sequence_error = self.cri.timestamp < last_timestamps.dat_r
|
||||
cond_underflow = ((self.cri.timestamp[fine_ts_width:]
|
||||
- self.csrs.underflow_margin.storage[fine_ts_width:]) < self.counter.value_sys)
|
||||
|
Loading…
Reference in New Issue
Block a user