mirror of https://github.com/m-labs/artiq.git
kc705: port amc101_dac/spi0 and sma_spi to spi2
This commit is contained in:
parent
21b1757bfd
commit
771bf87b56
|
@ -119,7 +119,7 @@ device_db = {
|
||||||
# Generic SPI
|
# Generic SPI
|
||||||
"spi0": {
|
"spi0": {
|
||||||
"type": "local",
|
"type": "local",
|
||||||
"module": "artiq.coredevice.spi",
|
"module": "artiq.coredevice.spi2",
|
||||||
"class": "SPIMaster",
|
"class": "SPIMaster",
|
||||||
"arguments": {"channel": 23}
|
"arguments": {"channel": 23}
|
||||||
},
|
},
|
||||||
|
@ -161,7 +161,7 @@ device_db = {
|
||||||
# DAC
|
# DAC
|
||||||
"spi_ams101": {
|
"spi_ams101": {
|
||||||
"type": "local",
|
"type": "local",
|
||||||
"module": "artiq.coredevice.spi",
|
"module": "artiq.coredevice.spi2",
|
||||||
"class": "SPIMaster",
|
"class": "SPIMaster",
|
||||||
"arguments": {"channel": 22}
|
"arguments": {"channel": 22}
|
||||||
},
|
},
|
||||||
|
|
|
@ -319,7 +319,7 @@ class NIST_CLOCK(_StandaloneBase):
|
||||||
self.submodules += phy
|
self.submodules += phy
|
||||||
rtio_channels.append(rtio.Channel.from_phy(phy))
|
rtio_channels.append(rtio.Channel.from_phy(phy))
|
||||||
|
|
||||||
phy = spi.SPIMaster(ams101_dac)
|
phy = spi2.SPIMaster(ams101_dac)
|
||||||
self.submodules += phy
|
self.submodules += phy
|
||||||
rtio_channels.append(rtio.Channel.from_phy(
|
rtio_channels.append(rtio.Channel.from_phy(
|
||||||
phy, ififo_depth=4))
|
phy, ififo_depth=4))
|
||||||
|
@ -423,7 +423,7 @@ class NIST_QC2(_StandaloneBase):
|
||||||
# add clock generators after TTLs
|
# add clock generators after TTLs
|
||||||
rtio_channels += clock_generators
|
rtio_channels += clock_generators
|
||||||
|
|
||||||
phy = spi.SPIMaster(ams101_dac)
|
phy = spi2.SPIMaster(ams101_dac)
|
||||||
self.submodules += phy
|
self.submodules += phy
|
||||||
rtio_channels.append(rtio.Channel.from_phy(
|
rtio_channels.append(rtio.Channel.from_phy(
|
||||||
phy, ififo_depth=4))
|
phy, ififo_depth=4))
|
||||||
|
@ -478,12 +478,12 @@ class SMA_SPI(_StandaloneBase):
|
||||||
self.submodules += phy
|
self.submodules += phy
|
||||||
rtio_channels.append(rtio.Channel.from_phy(phy))
|
rtio_channels.append(rtio.Channel.from_phy(phy))
|
||||||
|
|
||||||
phy = spi.SPIMaster(ams101_dac)
|
phy = spi2.SPIMaster(ams101_dac)
|
||||||
self.submodules += phy
|
self.submodules += phy
|
||||||
rtio_channels.append(rtio.Channel.from_phy(
|
rtio_channels.append(rtio.Channel.from_phy(
|
||||||
phy, ififo_depth=4))
|
phy, ififo_depth=4))
|
||||||
|
|
||||||
phy = spi.SPIMaster(self.platform.request("sma_spi"))
|
phy = spi2.SPIMaster(self.platform.request("sma_spi"))
|
||||||
self.submodules += phy
|
self.submodules += phy
|
||||||
rtio_channels.append(rtio.Channel.from_phy(
|
rtio_channels.append(rtio.Channel.from_phy(
|
||||||
phy, ififo_depth=128))
|
phy, ififo_depth=128))
|
||||||
|
|
Loading…
Reference in New Issue