gateware: use a per-variant subfolder in --output-dir. (fixes #912)

This commit also adds support for --variant and --args
to artiq-devtool.

artiq/frontend/artiq_devtool.py

@@ -14,6 +14,7 @@ import threading
 import os
 import shutil
 import re
+import shlex
 
 from artiq.tools import verbosity_args, init_logger
 from artiq.remoting import SSHClient
@@ -32,9 +33,16 @@ def get_argparser():
                         type=str, default="kc705",
                         help="target to build, one of: "
                              "kc705 kasli sayma")
+    parser.add_argument("-V", "--variant", metavar="VARIANT",
+                        type=str, default=None,
+                        help="variant to build, dependent on the target")
     parser.add_argument("-g", "--build-gateware",
                         default=False, action="store_true",
                         help="build gateware, not just software")
+    parser.add_argument("--args", metavar="ARGS",
+                        type=shlex.split, default=[],
+                        help="extra arguments for gateware/firmware build")
+
     parser.add_argument("-H", "--host",
                         type=str, default="lab.m-labs.hk",
                         help="SSH host where the development board is located")
@@ -69,7 +77,7 @@ def main():
         logging.getLogger().setLevel(logging.INFO)
 
     def build_dir(*path, target=args.target):
-        return os.path.join("/tmp", target, *path)
+        return os.path.join("/tmp/", "artiq_" + target, *path)
 
     if args.target == "kc705":
         board_type, firmware = "kc705", "runtime"
@@ -122,16 +130,19 @@ def main():
                     sys.exit(1)
 
     def command(*args, on_failure="Command failed"):
+        logger.debug("Running {}".format(" ".join([shlex.quote(arg) for arg in args])))
         try:
             subprocess.check_call(args)
         except subprocess.CalledProcessError:
             logger.error(on_failure)
             sys.exit(1)
 
-    def build(target, *extra_args, output_dir=build_dir()):
+    def build(target, *extra_args, output_dir=build_dir(), variant=args.variant):
         build_args = ["python3", "-m", "artiq.gateware.targets." + target, *extra_args]
         if not args.build_gateware:
             build_args.append("--no-compile-gateware")
+        if variant:
+            build_args += ["--variant", args.variant]
         build_args += ["--output-dir", output_dir]
         command(*build_args, on_failure="Build failed")
 
@@ -141,9 +152,12 @@ def main():
         flash_args = ["artiq_flash"]
         for _ in range(args.verbose):
             flash_args.append("-v")
-        flash_args += ["-H", args.host, "-t", board_type]
+        flash_args += ["-H", args.host]
+        flash_args += ["-t", board_type]
+        if args.variant:
+            flash_args += ["-V", args.variant]
+        flash_args += ["-I", "source {}".format(board_file)]
         flash_args += ["--srcbuild", build_dir()]
-        flash_args += ["--preinit-command", "source {}".format(board_file)]
         flash_args += steps
         command(*flash_args, on_failure="Flashing failed")
 
@@ -151,7 +165,7 @@ def main():
         if action == "build":
             logger.info("Building target")
             if args.target == "sayma":
-                build("sayma_rtm", output_dir=build_dir("rtm_gateware"))
+                build("sayma_rtm", output_dir=build_dir("rtm_gateware"), variant=None)
                 build("sayma_amc", "--rtm-csr-csv", build_dir("rtm_gateware", "rtm_csr.csv"))
             else:
                 build(args.target)

artiq/frontend/artiq_flash.py

@@ -312,17 +312,17 @@ def main():
     try:
         for action in args.action:
             if action == "gateware":
-                gateware_bin = artifact_path("gateware", "top.bin")
+                gateware_bin = artifact_path(variant, "gateware", "top.bin")
                 if not os.access(gateware_bin, os.R_OK):
                     bin_handle, gateware_bin = tempfile.mkstemp()
-                    gateware_bit = artifact_path("gateware", "top.bit")
+                    gateware_bit = artifact_path(variant, "gateware", "top.bit")
                     with open(gateware_bit, "rb") as bit_file, open(bin_handle, "wb") as bin_file:
                         bit2bin(bit_file, bin_file)
                     atexit.register(lambda: os.unlink(gateware_bin))
 
                 programmer.write_binary(*config["gateware"], gateware_bin)
             elif action == "bootloader":
-                bootloader_bin = artifact_path("software", "bootloader", "bootloader.bin")
+                bootloader_bin = artifact_path(variant, "software", "bootloader", "bootloader.bin")
                 programmer.write_binary(*config["bootloader"], bootloader_bin)
             elif action == "storage":
                 storage_img = args.storage
@@ -333,16 +333,16 @@ def main():
                 else:
                     firmware = "runtime"
 
-                firmware_fbi = artifact_path("software", firmware, firmware + ".fbi")
+                firmware_fbi = artifact_path(variant, "software", firmware, firmware + ".fbi")
                 programmer.write_binary(*config["firmware"], firmware_fbi)
             elif action == "load":
                 if args.target == "sayma":
                     rtm_gateware_bit = artifact_path("rtm_gateware", "rtm.bit")
                     programmer.load(rtm_gateware_bit, 0)
-                    gateware_bit = artifact_path("gateware", "top.bit")
+                    gateware_bit = artifact_path(variant, "gateware", "top.bit")
                     programmer.load(gateware_bit, 1)
                 else:
-                    gateware_bit = artifact_path("gateware", "top.bit")
+                    gateware_bit = artifact_path(variant, "gateware", "top.bit")
                     programmer.load(gateware_bit, 0)
             elif action == "start":
                 programmer.start()

artiq/gateware/targets/kasli.py

@@ -248,7 +248,7 @@ class Master(MiniSoC, AMPSoC):
         phy = ttl_simple.Output(platform.request("sfp_ctl", 1).led)
         self.submodules += phy
         rtio_channels.append(rtio.Channel.from_phy(phy))
-        
+
         self.submodules.rtio_moninj = rtio.MonInj(rtio_channels)
         self.csr_devices.append("rtio_moninj")
 
@@ -381,6 +381,7 @@ def main():
         description="ARTIQ device binary builder for Kasli systems")
     builder_args(parser)
     soc_kasli_args(parser)
+    parser.set_defaults(output_dir="artiq_kasli")
     parser.add_argument("-V", "--variant", default="opticlock",
                         help="variant: opticlock/master/satellite "
                              "(default: %(default)s)")

artiq/gateware/targets/kc705.py

@@ -329,7 +329,7 @@ class NIST_CLOCK(_StandaloneBase):
             self.submodules += phy
             rtio_channels.append(rtio.Channel.from_phy(
                 phy, ififo_depth=128))
-            
+
         phy = spi.SPIMaster(platform.request("sdcard_spi_33"))
         self.submodules += phy
         rtio_channels.append(rtio.Channel.from_phy(
@@ -526,6 +526,7 @@ def main():
         description="KC705 gateware and firmware builder")
     builder_args(parser)
     soc_kc705_args(parser)
+    parser.set_defaults(output_dir="artiq_kc705")
     parser.add_argument("-V", "--variant", default="nist_clock",
                         help="variant: "
                              "nist_clock/nist_qc2/sma_spi "

conda/artiq-dev/meta.yaml

@@ -15,7 +15,7 @@ requirements:
     - python >=3.5.3,<3.6
     - setuptools 33.1.1
     - migen 0.6 py35_11+git78a671d
-    - misoc 0.8 py35_54+gitcb8e314c
+    - misoc 0.9 py35_1+git2e2b7838
     - jesd204b 0.4
     - microscope
     - binutils-or1k-linux >=2.27

conda/artiq-kasli-opticlock/build.sh

@@ -4,6 +4,6 @@ SOC_PREFIX=$SP_DIR/artiq/binaries/kasli-opticlock
 mkdir -p $SOC_PREFIX
 
 V=1 $PYTHON -m artiq.gateware.targets.kasli -V opticlock
-cp misoc_opticlock_kasli/gateware/top.bit $SOC_PREFIX
+cp artiq_kasli/opticlock/gateware/top.bit $SOC_PREFIX
-cp misoc_opticlock_kasli/software/bootloader/bootloader.bin $SOC_PREFIX
+cp artiq_kasli/opticlock/software/bootloader/bootloader.bin $SOC_PREFIX
-cp misoc_opticlock_kasli/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
+cp artiq_kasli/opticlock/software/runtime/runtime.{elf,fbi} $SOC_PREFIX

conda/artiq-kc705-nist_clock/build.sh

@@ -4,6 +4,6 @@ SOC_PREFIX=$SP_DIR/artiq/binaries/kc705-nist_clock
 mkdir -p $SOC_PREFIX
 
 V=1 $PYTHON -m artiq.gateware.targets.kc705 -V nist_clock
-cp misoc_nist_clock_kc705/gateware/top.bit $SOC_PREFIX
+cp artiq_kc705/nist_clock/gateware/top.bit $SOC_PREFIX
-cp misoc_nist_clock_kc705/software/bootloader/bootloader.bin $SOC_PREFIX
+cp artiq_kc705/nist_clock/software/bootloader/bootloader.bin $SOC_PREFIX
-cp misoc_nist_clock_kc705/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
+cp artiq_kc705/nist_clock/software/runtime/runtime.{elf,fbi} $SOC_PREFIX

conda/artiq-kc705-nist_qc2/build.sh

@@ -4,6 +4,6 @@ SOC_PREFIX=$SP_DIR/artiq/binaries/kc705-nist_qc2
 mkdir -p $SOC_PREFIX
 
 V=1 $PYTHON -m artiq.gateware.targets.kc705 -V nist_qc2
-cp misoc_nist_qc2_kc705/gateware/top.bit $SOC_PREFIX
+cp artiq_kc705/nist_qc2/gateware/top.bit $SOC_PREFIX
-cp misoc_nist_qc2_kc705/software/bootloader/bootloader.bin $SOC_PREFIX
+cp artiq_kc705/nist_qc2/software/bootloader/bootloader.bin $SOC_PREFIX
-cp misoc_nist_qc2_kc705/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
+cp artiq_kc705/nist_qc2/software/runtime/runtime.{elf,fbi} $SOC_PREFIX

conda/artiq-sayma-standalone/build.sh

@@ -7,7 +7,7 @@ mkdir -p $SOC_PREFIX
 
 $PYTHON -m artiq.gateware.targets.sayma_amc -V standalone \
   --rtm-csr-csv $RTM_PREFIX/rtm_csr.csv
-cp artiq_sayma/gateware/top.bit $SOC_PREFIX
+cp artiq_sayma/standalone/gateware/top.bit $SOC_PREFIX
-cp artiq_sayma/software/bootloader/bootloader.bin $SOC_PREFIX
+cp artiq_sayma/standalone/software/bootloader/bootloader.bin $SOC_PREFIX
-cp artiq_sayma/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
+cp artiq_sayma/standalone/software/runtime/runtime.{elf,fbi} $SOC_PREFIX
 cp $RTM_PREFIX/rtm.bit $SOC_PREFIX