mirror of https://github.com/m-labs/artiq.git
gateware: fix kernel CPU exec address.
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2392113bb6
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617e345d16
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@ -7,7 +7,7 @@ from misoc.integration.soc_core import mem_decoder
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class KernelCPU(Module):
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class KernelCPU(Module):
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def __init__(self, platform,
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def __init__(self, platform,
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exec_address=0x40800000,
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exec_address=0x40800080,
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main_mem_origin=0x40000000,
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main_mem_origin=0x40000000,
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l2_size=8192):
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l2_size=8192):
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self._reset = CSRStorage(reset=1)
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self._reset = CSRStorage(reset=1)
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