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artiq
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Revert "compiler: enabled vectorize option" 

This reverts commit 636898c302.
This commit is contained in:
pca006132 2021-01-11 19:43:12 +08:00
parent 3e93d71aeb
commit 5b5db1433b
2 changed files with 0 additions and 5 deletions
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1
RELEASE_NOTES.rst
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@ -28,7 +28,6 @@ Highlights:
- SERDES TTL inputs can now detect edges on pulses that are shorter
than the RTIO period (https://github.com/m-labs/artiq/issues/1432)
- Improved performance for kernel RPC involving list and array.
- Improved performance for computation involving loops.
* Coredevice SI to mu conversions now always return valid codes, or raise a ``ValueError``.
* Zotino now exposes ``voltage_to_mu()``
* ``ad9910``: The maximum amplitude scale factor is now ``0x3fff`` (was ``0x3ffe``

4
artiq/compiler/targets.py
View File

@ -105,11 +105,7 @@ class Target:
return llmachine
def optimize(self, llmodule):
pmb = llvm.create_pass_manager_builder()
pmb.slp_vectorize = True
pmb.loop_vectorize = True
llpassmgr = llvm.create_module_pass_manager()
pmb.populate(llpassmgr)
# Register our alias analysis passes.
llpassmgr.add_basic_alias_analysis_pass()