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artiq
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rtio: remove unnecessary attributes

This commit is contained in:
Sebastien Bourdeauducq 2014-12-01 17:47:24 +08:00
parent cd587e4f12
commit 57d633f48e
2 changed files with 4 additions and 5 deletions
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5
artiq/coredevice/dds.py
View File

@ -26,6 +26,7 @@ class DDS(AutoContext):
parameters = "dds_sysclk reg_channel rtio_switch" parameters = "dds_sysclk reg_channel rtio_switch"
def build(self): def build(self):
self.previous_on = False
self.previous_frequency = 0*MHz self.previous_frequency = 0*MHz
self.set_phase_mode(PHASE_MODE_CONTINUOUS) self.set_phase_mode(PHASE_MODE_CONTINUOUS)
self.sw = rtio.RTIOOut(self, channel=self.rtio_switch) self.sw = rtio.RTIOOut(self, channel=self.rtio_switch)
@ -95,7 +96,7 @@ class DDS(AutoContext):
# Channel is off: # Channel is off:
# Use soft timing on FUD to prevent conflicts when reprogramming # Use soft timing on FUD to prevent conflicts when reprogramming
# several channels that need to be turned on at the same time. # several channels that need to be turned on at the same time.
rt_fud = merge or bool(self.sw.previous_value) rt_fud = merge or self.previous_on
ftw = self.frequency_to_ftw(frequency) ftw = self.frequency_to_ftw(frequency)
if self.phase_mode != PHASE_MODE_CONTINUOUS: if self.phase_mode != PHASE_MODE_CONTINUOUS:
phase_per_microcycle = ftw*int64( phase_per_microcycle = ftw*int64(
@ -108,6 +109,7 @@ class DDS(AutoContext):
rt_fud, self.phase_mode == PHASE_MODE_TRACKING) rt_fud, self.phase_mode == PHASE_MODE_TRACKING)
self.previous_frequency = frequency self.previous_frequency = frequency
self.sw.on() self.sw.on()
self.previous_on = True
if phase_mode != PHASE_MODE_DEFAULT: if phase_mode != PHASE_MODE_DEFAULT:
self.set_phase_mode(old_phase_mode) self.set_phase_mode(old_phase_mode)
@ -118,6 +120,7 @@ class DDS(AutoContext):
""" """
self.sw.off() self.sw.off()
self.previous_on = False
@kernel @kernel
def pulse(self, frequency, duration, def pulse(self, frequency, duration,

4
artiq/coredevice/rtio.py
View File

@ -14,7 +14,6 @@ class LLRTIOOut(AutoContext):
parameters = "channel" parameters = "channel"
def build(self): def build(self):
self.previous_timestamp = int64(0) # in RTIO cycles
self._set_oe() self._set_oe()
@kernel @kernel
@ -30,7 +29,6 @@ class LLRTIOOut(AutoContext):
""" """
syscall("rtio_set", t, self.channel, value) syscall("rtio_set", t, self.channel, value)
self.previous_timestamp = t
@kernel @kernel
def on(self, t): def on(self, t):
@ -56,7 +54,6 @@ class _RTIOBase(AutoContext):
def build(self): def build(self):
self.previous_timestamp = int64(0) # in RTIO cycles self.previous_timestamp = int64(0) # in RTIO cycles
self.previous_value = 0
@kernel @kernel
def _set_oe(self, oe): def _set_oe(self, oe):
@ -66,7 +63,6 @@ class _RTIOBase(AutoContext):
def _set_value(self, value): def _set_value(self, value):
syscall("rtio_set", time_to_cycles(now()), self.channel, value) syscall("rtio_set", time_to_cycles(now()), self.channel, value)
self.previous_timestamp = time_to_cycles(now()) self.previous_timestamp = time_to_cycles(now())
self.previous_value = value
class RTIOOut(_RTIOBase): class RTIOOut(_RTIOBase):