mirror of https://github.com/m-labs/artiq.git
drtio: add scrambler/descrambler and test
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@ -1,6 +1,45 @@
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from functools import reduce
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from operator import xor
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from migen import *
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class Scrambler(Module):
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def __init__(self, n_io, n_state=23, taps=[17, 22]):
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self.i = Signal(n_io)
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self.o = Signal(n_io)
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# # #
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state = Signal(n_state, reset=1)
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curval = [state[i] for i in range(n_state)]
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for i in reversed(range(n_io)):
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out = self.i[i] ^ reduce(xor, [curval[tap] for tap in taps])
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self.sync += self.o[i].eq(out)
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curval.insert(0, out)
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curval.pop()
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self.sync += state.eq(Cat(*curval[:n_state]))
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class Descrambler(Module):
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def __init__(self, n_io, n_state=23, taps=[17, 22]):
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self.i = Signal(n_io)
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self.o = Signal(n_io)
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# # #
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state = Signal(n_state, reset=1)
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curval = [state[i] for i in range(n_state)]
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for i in reversed(range(n_io)):
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flip = reduce(xor, [curval[tap] for tap in taps])
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self.sync += self.o[i].eq(self.i[i] ^ flip)
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curval.insert(0, self.i[i])
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curval.pop()
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self.sync += state.eq(Cat(*curval[:n_state]))
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def K(x, y):
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return (y << 5) | x
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@ -33,7 +72,7 @@ class LinkLayerTX(Module):
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# the following meanings:
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# 100 idle/auxiliary framing
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# 0AB 2 bits of auxiliary data
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aux_scrambler = Scrambler(3*nwords)
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aux_scrambler = CEInserter()(Scrambler(3*nwords))
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self.submodules += aux_scrambler
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aux_data_ctl = []
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for i in range(nwords):
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@ -0,0 +1,35 @@
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import unittest
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from migen import *
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from artiq.gateware.drtio.link_layer import Scrambler, Descrambler
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def process(dut, seq):
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rseq = []
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def pump():
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yield dut.i.eq(seq[0])
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yield
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for w in seq[1:]:
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yield dut.i.eq(w)
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yield
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rseq.append((yield dut.o))
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yield
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rseq.append((yield dut.o))
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run_simulation(dut, pump())
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return rseq
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class TestScrambler(unittest.TestCase):
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def test_roundtrip(self):
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seq = list(range(256))*3
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scrambled_seq = process(Scrambler(8), seq)
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descrambled_seq = process(Descrambler(8), scrambled_seq)
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self.assertNotEqual(seq, scrambled_seq)
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self.assertEqual(seq, descrambled_seq)
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def test_resync(self):
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seq = list(range(256))
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scrambled_seq = process(Scrambler(8), seq)
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descrambled_seq = process(Descrambler(8), scrambled_seq[20:])
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self.assertEqual(seq[100:], descrambled_seq[80:])
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