M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity

gateware: CRIArbiter -> CRISwitch.

This commit is contained in:
whitequark 2017-04-05 16:10:39 +00:00
parent 391660e545
commit 47632f81b1
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
artiq/gateware/rtio/cri.py
View File

@ -123,7 +123,7 @@ class CRIDecoder(Module):
self.comb += Case(selected, cases)
class CRIArbiter(Module, AutoCSR):
class CRISwitch(Module, AutoCSR):
def __init__(self, masters=2, slave=None):
if isinstance(masters, int):
masters = [Interface() for _ in range(masters)]
@ -156,8 +156,8 @@ class CRIArbiter(Module, AutoCSR):
class CRIInterconnectShared(Module):
def __init__(self, masters=2, slaves=2):
shared = Interface()
self.submodules.arbiter = CRIArbiter(masters, shared)
self.submodules.switch = CRISwitch(masters, shared)
self.submodules.decoder = CRIDecoder(slaves, shared)
def get_csrs(self):
return self.arbiter.get_csrs()
return self.switch.get_csrs()