diff --git a/doc/manual/core_device.rst b/doc/manual/core_device.rst
index db2e69e91..ec372418e 100644
--- a/doc/manual/core_device.rst
+++ b/doc/manual/core_device.rst
@@ -75,6 +75,20 @@ With the CLOCK hardware, the TTL lines are mapped as follows:
 | 21                 | LA32_P                | Clock        |
 +--------------------+-----------------------+--------------+
 
+The board has RTIO SPI buses mapped as follows:
+
++--------------+-------------+-------------+-----------+------------+
+| RTIO channel | CS_N        | MOSI        | MISO      | CLK        |
++==============+=============+=============+===========+============+
+| 22           | AMS101_CS_N | AMS101_MOSI |           | AMS101_CLK |
++--------------+-------------+-------------+-----------+------------+
+| 23           | SPI0_CS_N   | SPI0_MOSI   | SPI0_MISO | SPI0_CLK   |
++--------------+-------------+-------------+-----------+------------+
+| 24           | SPI1_CS_N   | SPI1_MOSI   | SPI1_MISO | SPI1_CLK   |
++--------------+-------------+-------------+-----------+------------+
+| 25           | SPI2_CS_N   | SPI2_MOSI   | SPI2_MISO | SPI2_CLK   |
++--------------+-------------+-------------+-----------+------------+
+
 
 NIST QC2
 ++++++++