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coredevice: reinstate AugAssign methods

This commit is contained in:
Sebastien Bourdeauducq 2021-11-13 12:42:13 +08:00
parent 7a2428b6a7
commit 222968d68b
3 changed files with 9 additions and 10 deletions
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9
artiq/coredevice/ad9912.py
View File

@ -89,8 +89,7 @@ class AD9912:
self.bus.write(0) self.bus.write(0)
data = self.bus.read() data = self.bus.read()
if length < 4: if length < 4:
# NAC3TODO data &= (1 << (length * 8)) - 1 data &= (1 << (length * 8)) - 1
data = data & (1 << (length * 8)) - 1
return data return data
@kernel @kernel
@ -120,7 +119,7 @@ class AD9912:
self.cpld.io_update.pulse(2. * us) self.cpld.io_update.pulse(2. * us)
self.core.delay(1. * ms) self.core.delay(1. * ms)
# NAC3TODO @kernel @kernel
def set_att_mu(self, att: int32): def set_att_mu(self, att: int32):
"""Set digital step attenuator in machine units. """Set digital step attenuator in machine units.
@ -132,7 +131,7 @@ class AD9912:
""" """
self.cpld.set_att_mu(self.chip_select - 4, att) self.cpld.set_att_mu(self.chip_select - 4, att)
# NAC3TODO @kernel @kernel
def set_att(self, att: float): def set_att(self, att: float):
"""Set digital step attenuator in SI units. """Set digital step attenuator in SI units.
@ -262,7 +261,7 @@ class AD9912:
# Convert and return # Convert and return
return self.ftw_to_frequency(ftw), self.pow_to_turns(pow_) return self.ftw_to_frequency(ftw), self.pow_to_turns(pow_)
# NAC3TODO @kernel @kernel
def cfg_sw(self, state: bool): def cfg_sw(self, state: bool):
"""Set CPLD CFG RF switch state. The RF switch is controlled by the """Set CPLD CFG RF switch state. The RF switch is controlled by the
logical or of the CPLD configuration shift register logical or of the CPLD configuration shift register

2
artiq/coredevice/ttl.py
View File

@ -307,7 +307,7 @@ class TTLInOut:
self._set_sensitivity(0) self._set_sensitivity(0)
return now_mu() return now_mu()
# NAC3TODO @kernel @kernel
def count(self, up_to_timestamp_mu: int64) -> int32: def count(self, up_to_timestamp_mu: int64) -> int32:
"""Consume RTIO input events until the hardware timestamp counter has """Consume RTIO input events until the hardware timestamp counter has
reached the specified timestamp and return the number of observed reached the specified timestamp and return the number of observed

8
artiq/coredevice/urukul.py
View File

@ -265,7 +265,7 @@ class CPLD:
self.cfg_write(self.cfg_reg | (1 << CFG_IO_RST)) self.cfg_write(self.cfg_reg | (1 << CFG_IO_RST))
self.cfg_write(self.cfg_reg & ~(1 << CFG_IO_RST)) self.cfg_write(self.cfg_reg & ~(1 << CFG_IO_RST))
# NAC3TODO @kernel @kernel
def cfg_sw(self, channel: int32, on: bool): def cfg_sw(self, channel: int32, on: bool):
"""Configure the RF switches through the configuration register. """Configure the RF switches through the configuration register.
@ -311,7 +311,7 @@ class CPLD:
pass pass
return code return code
# NAC3TODO @kernel @kernel
def set_att_mu(self, channel: int32, att: int32): def set_att_mu(self, channel: int32, att: int32):
"""Set digital step attenuator in machine units. """Set digital step attenuator in machine units.
@ -340,7 +340,7 @@ class CPLD:
self.bus.write(att_reg) self.bus.write(att_reg)
self.att_reg = att_reg self.att_reg = att_reg
# NAC3TODO @kernel @kernel
def set_att(self, channel: int32, att: float): def set_att(self, channel: int32, att: float):
"""Set digital step attenuator in SI units. """Set digital step attenuator in SI units.
@ -421,7 +421,7 @@ class CPLD:
# NAC3TODO assert ftw * div == ftw_max # NAC3TODO assert ftw * div == ftw_max
self.sync.set_mu(ftw) self.sync.set_mu(ftw)
# NAC3TODO @kernel @kernel
def set_profile(self, profile: int32): def set_profile(self, profile: int32):
"""Set the PROFILE pins. """Set the PROFILE pins.