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gateware/targets: enable serwb scrambling on sayma amc & rtm

This commit is contained in:
Florent Kermarrec 2018-01-03 17:34:46 +01:00
parent 907af25a69
commit 1e972034e8
2 changed files with 2 additions and 2 deletions
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2
artiq/gateware/targets/sayma_amc_standalone.py
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@ -168,7 +168,7 @@ class Standalone(MiniSoC, AMPSoC):
serwb_phy_amc.serdes.cd_serwb_serdes.clk, serwb_phy_amc.serdes.cd_serwb_serdes.clk,
serwb_phy_amc.serdes.cd_serwb_serdes_5x.clk) serwb_phy_amc.serdes.cd_serwb_serdes_5x.clk)
serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave") serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave", with_scrambling=True)
self.submodules += serwb_core self.submodules += serwb_core
self.add_wb_slave(self.mem_map["serwb"], 8192, serwb_core.etherbone.wishbone.bus) self.add_wb_slave(self.mem_map["serwb"], 8192, serwb_core.etherbone.wishbone.bus)

2
artiq/gateware/targets/sayma_rtm.py
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@ -159,7 +159,7 @@ class SaymaRTM(Module):
serwb_phy_rtm.serdes.cd_serwb_serdes.clk, serwb_phy_rtm.serdes.cd_serwb_serdes.clk,
serwb_phy_rtm.serdes.cd_serwb_serdes_5x.clk) serwb_phy_rtm.serdes.cd_serwb_serdes_5x.clk)
serwb_core = serwb.core.SERWBCore(serwb_phy_rtm, int(clk_freq), mode="master") serwb_core = serwb.core.SERWBCore(serwb_phy_rtm, int(clk_freq), mode="master", with_scrambling=True)
self.submodules += serwb_core self.submodules += serwb_core
# process CSR devices and connect them to serwb # process CSR devices and connect them to serwb