From 172633c7dae6026594258e60129d382f7f4bd18f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Robert=20J=C3=B6rdens?= Date: Tue, 6 Nov 2018 17:35:57 +0100 Subject: [PATCH] test_ad9910: default to a useful seed MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Robert Jördens --- artiq/coredevice/ad9910.py | 8 +++----- artiq/test/coredevice/test_ad9910.py | 2 +- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/artiq/coredevice/ad9910.py b/artiq/coredevice/ad9910.py index d988ee9e9..5fa75a82b 100644 --- a/artiq/coredevice/ad9910.py +++ b/artiq/coredevice/ad9910.py @@ -414,7 +414,7 @@ class AD9910: self.cpld.io_update.pulse(1*us) @kernel - def tune_sync_delay(self, sync_delay_seed): + def tune_sync_delay(self, sync_delay_seed=8): """Find a stable SYNC_IN delay. This method first locates the smallest SYNC_IN validity window at @@ -439,10 +439,8 @@ class AD9910: if in_delay & 1: in_delay = -in_delay in_delay = sync_delay_seed + (in_delay >> 1) - if in_delay < 0: - in_delay = 0 - elif in_delay > 31: - in_delay = 31 + if in_delay < 0 or in_delay > 31: + continue self.set_sync(in_delay, window) self.clear_smp_err() # integrate SMP_ERR statistics for a few hundred cycles diff --git a/artiq/test/coredevice/test_ad9910.py b/artiq/test/coredevice/test_ad9910.py index d60972878..1243760cc 100644 --- a/artiq/test/coredevice/test_ad9910.py +++ b/artiq/test/coredevice/test_ad9910.py @@ -81,7 +81,7 @@ class AD9910Exp(EnvExperiment): self.sync_scan(err, win=i) print(err) self.core.break_realtime() - dly, win = self.dev.tune_sync_delay(self.dev.sync_delay_seed) + dly, win = self.dev.tune_sync_delay() self.sync_scan(err, win=win + 1) # tighten window by 2*75ps self.set_dataset("dly", dly) self.set_dataset("win", win)