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sawg: work around bool->int
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parent
1562f79101
commit
06721c19c4
artiq
@ -1,4 +1,4 @@
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from artiq.language.types import TInt32, TBool
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from artiq.language.types import TInt32
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from artiq.language.core import kernel, now_mu
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from artiq.language.core import kernel, now_mu
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from artiq.coredevice.spline import Spline
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from artiq.coredevice.spline import Spline
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from artiq.coredevice.rtio import rtio_output
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from artiq.coredevice.rtio import rtio_output
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@ -46,7 +46,7 @@ class Config:
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rtio_output(now_mu(), self.channel, _SAWG_DIV, div | (n << 16))
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rtio_output(now_mu(), self.channel, _SAWG_DIV, div | (n << 16))
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@kernel
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@kernel
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def set_clr(self, clr0: TBool, clr1: TBool, clr2: TBool):
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def set_clr(self, clr0: TInt32, clr1: TInt32, clr2: TInt32):
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"""Set the phase clear mode for the three phase accumulators.
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"""Set the phase clear mode for the three phase accumulators.
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When the ``clr`` bit for a given phase accumulator is
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When the ``clr`` bit for a given phase accumulator is
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@ -65,11 +65,11 @@ class Config:
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:param clr2: Auto-clear phase accumulator of the ``phase2``/
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:param clr2: Auto-clear phase accumulator of the ``phase2``/
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``frequency2`` DDS. Default: ``True``
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``frequency2`` DDS. Default: ``True``
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"""
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"""
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rtio_output(now_mu(), self.channel, _SAWG_CLR, int(clr1) |
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rtio_output(now_mu(), self.channel, _SAWG_CLR, clr1 |
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(int(clr2) << 1) | (int(clr0) << 2))
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(clr2 << 1) | (clr0 << 2))
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@kernel
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@kernel
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def set_iq_en(self, i_enable: TBool, q_enable: TBool):
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def set_iq_en(self, i_enable: TInt32, q_enable: TInt32):
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"""Enable I/Q data on this DAC channel.
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"""Enable I/Q data on this DAC channel.
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Every pair of SAWG channels forms a buddy pair.
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Every pair of SAWG channels forms a buddy pair.
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@ -86,8 +86,8 @@ class Config:
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DUC-DDS data of this SAWG's *buddy* channel to *this* DAC
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DUC-DDS data of this SAWG's *buddy* channel to *this* DAC
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channel. Default: ``0``.
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channel. Default: ``0``.
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"""
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"""
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rtio_output(now_mu(), self.channel, _SAWG_IQ_EN, int(i_enable) |
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rtio_output(now_mu(), self.channel, _SAWG_IQ_EN, i_enable |
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(int(q_enable) << 1))
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(q_enable << 1))
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@kernel
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@kernel
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def set_duc_i_max(self, limit: TInt32):
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def set_duc_i_max(self, limit: TInt32):
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@ -17,7 +17,7 @@ class SAWGTestTwoTone(EnvExperiment):
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self.core.reset()
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self.core.reset()
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self.ttl_sma.output()
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self.ttl_sma.output()
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self.sawg0.config.set_clr(True, True, True)
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self.sawg0.config.set_clr(1, 1, 1)
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delay(10*us)
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delay(10*us)
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self.sawg0.config.set_duc_i_max(0x7fff)
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self.sawg0.config.set_duc_i_max(0x7fff)
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delay(10*us)
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delay(10*us)
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