2014-08-28 16:56:48 +08:00
|
|
|
#ifndef __DDS_H
|
|
|
|
|
#define __DDS_H
|
|
|
|
|
|
2015-03-12 20:14:06 +08:00
|
|
|
#include <hw/common.h>
|
2015-04-11 21:32:01 +08:00
|
|
|
#include <generated/mem.h>
|
2015-03-12 20:14:06 +08:00
|
|
|
|
2015-05-08 16:51:54 +08:00
|
|
|
/* Maximum number of commands in a batch */
|
|
|
|
|
#define DDS_MAX_BATCH 16
|
|
|
|
|
|
|
|
|
|
/* DDS core registers */
|
2015-03-12 20:14:06 +08:00
|
|
|
#define DDS_FTW0 0x0a
|
|
|
|
|
#define DDS_FTW1 0x0b
|
|
|
|
|
#define DDS_FTW2 0x0c
|
|
|
|
|
#define DDS_FTW3 0x0d
|
|
|
|
|
#define DDS_POW0 0x0e
|
|
|
|
|
#define DDS_POW1 0x0f
|
2015-05-08 14:44:39 +08:00
|
|
|
#define DDS_FUD 0x40
|
2015-03-12 20:14:06 +08:00
|
|
|
#define DDS_GPIO 0x41
|
|
|
|
|
|
2015-05-08 14:44:39 +08:00
|
|
|
enum {
|
|
|
|
|
PHASE_MODE_CONTINUOUS = 0,
|
|
|
|
|
PHASE_MODE_ABSOLUTE = 1,
|
|
|
|
|
PHASE_MODE_TRACKING = 2
|
|
|
|
|
};
|
|
|
|
|
|
2015-05-09 17:11:34 +08:00
|
|
|
void dds_init_all(void);
|
2015-05-08 14:44:39 +08:00
|
|
|
void dds_init(long long int timestamp, int channel);
|
2015-05-08 16:51:54 +08:00
|
|
|
void dds_batch_enter(long long int timestamp);
|
|
|
|
|
void dds_batch_exit(void);
|
2015-05-08 14:44:39 +08:00
|
|
|
void dds_set(long long int timestamp, int channel,
|
|
|
|
|
unsigned int ftw, unsigned int pow, int phase_mode);
|
2014-08-28 16:56:48 +08:00
|
|
|
|
|
|
|
|
#endif /* __DDS_H */
|
