2014-07-04 23:49:08 +08:00
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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2014-07-07 03:06:53 +08:00
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#include <stdarg.h>
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2014-07-24 09:12:22 +08:00
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#include <crc.h>
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2014-07-04 23:49:08 +08:00
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#include <irq.h>
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#include <uart.h>
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#include <console.h>
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#include <system.h>
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2014-07-24 01:49:48 +08:00
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#include <hw/common.h>
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2014-07-04 23:49:08 +08:00
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#include <generated/csr.h>
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#include "elf_loader.h"
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2014-07-08 01:13:43 +08:00
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enum {
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2014-07-16 01:21:31 +08:00
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MSGTYPE_REQUEST_IDENT = 0x01,
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MSGTYPE_LOAD_KERNEL = 0x02,
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MSGTYPE_KERNEL_FINISHED = 0x03,
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MSGTYPE_RPC_REQUEST = 0x04,
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2014-07-08 01:13:43 +08:00
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};
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static int receive_int(void)
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{
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unsigned int r;
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int i;
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r = 0;
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for(i=0;i<4;i++) {
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r <<= 8;
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r |= (unsigned char)uart_read();
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}
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return r;
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}
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static char receive_char(void)
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{
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return uart_read();
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}
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static void send_int(int x)
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{
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int i;
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for(i=0;i<4;i++) {
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uart_write((x & 0xff000000) >> 24);
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x <<= 8;
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}
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}
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static void send_sint(short int i)
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{
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uart_write((i >> 8) & 0xff);
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uart_write(i & 0xff);
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}
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static void send_char(char c)
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{
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uart_write(c);
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}
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2014-07-04 23:49:08 +08:00
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static void receive_sync(void)
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{
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char c;
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int recognized;
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recognized = 0;
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2014-07-08 01:13:43 +08:00
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while(recognized < 4) {
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c = uart_read();
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if(c == 0x5a)
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2014-07-04 23:49:08 +08:00
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recognized++;
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2014-07-08 01:13:43 +08:00
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else
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2014-07-04 23:49:08 +08:00
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recognized = 0;
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}
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}
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2014-07-08 01:13:43 +08:00
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static void send_sync(void)
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2014-07-04 23:49:08 +08:00
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{
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2014-07-08 01:13:43 +08:00
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send_int(0x5a5a5a5a);
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2014-07-04 23:49:08 +08:00
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}
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2014-07-16 01:21:31 +08:00
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static int ident_and_download_kernel(void *buffer, int maxlength)
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2014-07-04 23:49:08 +08:00
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{
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int length;
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2014-07-24 09:12:22 +08:00
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unsigned int crc;
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2014-07-04 23:49:08 +08:00
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int i;
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2014-07-16 01:21:31 +08:00
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char msgtype;
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2014-07-04 23:49:08 +08:00
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unsigned char *_buffer = buffer;
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2014-07-16 01:21:31 +08:00
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while(1) {
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receive_sync();
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msgtype = receive_char();
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if(msgtype == MSGTYPE_REQUEST_IDENT) {
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send_int(0x41524f52); /* "AROR" - ARTIQ runtime on OpenRISC */
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send_int(1000000000000LL/identifier_frequency_read()); /* RTIO clock period in picoseconds */
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} else if(msgtype == MSGTYPE_LOAD_KERNEL) {
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length = receive_int();
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2014-07-24 09:12:22 +08:00
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if(length > maxlength) {
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send_char(0x4c); /* Incorrect length */
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2014-07-16 01:21:31 +08:00
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return -1;
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2014-07-24 09:12:22 +08:00
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}
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crc = receive_int();
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2014-07-16 01:21:31 +08:00
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for(i=0;i<length;i++)
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_buffer[i] = receive_char();
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2014-07-24 09:12:22 +08:00
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if(crc32(buffer, length) != crc) {
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send_char(0x43); /* CRC failed */
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return -1;
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}
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2014-07-16 01:21:31 +08:00
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send_char(0x4f); /* kernel reception OK */
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return length;
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} else
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return -1;
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}
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2014-07-04 23:49:08 +08:00
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}
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2014-07-07 03:06:53 +08:00
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static int rpc(int rpc_num, int n_args, ...)
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2014-07-06 01:39:49 +08:00
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{
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2014-07-08 01:13:43 +08:00
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send_sync();
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send_char(MSGTYPE_RPC_REQUEST);
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send_sint(rpc_num);
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send_char(n_args);
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2014-07-07 03:06:53 +08:00
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va_list args;
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va_start(args, n_args);
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while(n_args--)
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2014-07-08 01:13:43 +08:00
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send_int(va_arg(args, int));
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2014-07-07 03:06:53 +08:00
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va_end(args);
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2014-07-08 01:13:43 +08:00
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return receive_int();
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2014-07-06 01:39:49 +08:00
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}
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2014-07-21 08:28:56 +08:00
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static void gpio_set(int channel, int value)
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2014-07-06 04:46:43 +08:00
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{
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2014-07-23 00:45:59 +08:00
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static int csr_value;
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if(value)
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csr_value |= 1 << channel;
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else
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csr_value &= ~(1 << channel);
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leds_out_write(csr_value);
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2014-07-21 08:28:56 +08:00
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}
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static void rtio_set(int timestamp, int channel, int value)
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{
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rtio_chan_sel_write(channel);
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rtio_o_timestamp_write(timestamp);
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rtio_o_value_write(value);
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while(!rtio_o_writable_read());
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rtio_o_we_write(1);
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2014-07-06 04:46:43 +08:00
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}
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2014-07-23 01:36:54 +08:00
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static void rtio_sync(int channel)
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{
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rtio_chan_sel_write(channel);
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while(rtio_o_level_read() != 0);
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}
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2014-07-24 07:10:49 +08:00
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#define DDS_FTW0 0x0a
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#define DDS_FTW1 0x0b
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#define DDS_FTW2 0x0c
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#define DDS_FTW3 0x0d
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2014-07-24 01:49:48 +08:00
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#define DDS_FUD 0x40
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#define DDS_GPIO 0x41
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2014-07-24 07:10:49 +08:00
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#define DDS_READ(addr) \
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MMPTR(0xb0000000 + (addr)*4)
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2014-07-24 01:49:48 +08:00
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2014-07-24 07:10:49 +08:00
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#define DDS_WRITE(addr, data) \
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MMPTR(0xb0000000 + (addr)*4) = data
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2014-07-24 01:49:48 +08:00
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static void dds_program(int channel, int ftw)
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{
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2014-07-24 07:10:49 +08:00
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DDS_WRITE(DDS_GPIO, channel);
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DDS_WRITE(DDS_FTW0, ftw & 0xff);
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DDS_WRITE(DDS_FTW1, (ftw >> 8) & 0xff);
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DDS_WRITE(DDS_FTW2, (ftw >> 16) & 0xff);
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DDS_WRITE(DDS_FTW3, (ftw >> 24) & 0xff);
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DDS_WRITE(DDS_FUD, 0);
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2014-07-24 01:49:48 +08:00
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}
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2014-07-06 01:39:49 +08:00
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static const struct symbol syscalls[] = {
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2014-07-07 03:06:53 +08:00
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{"__syscall_rpc", rpc},
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2014-07-06 04:46:43 +08:00
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{"__syscall_gpio_set", gpio_set},
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2014-07-21 08:28:56 +08:00
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{"__syscall_rtio_set", rtio_set},
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2014-07-23 01:36:54 +08:00
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{"__syscall_rtio_sync", rtio_sync},
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2014-07-24 01:49:48 +08:00
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{"__syscall_dds_program", dds_program},
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2014-07-06 01:39:49 +08:00
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{NULL, NULL}
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};
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2014-07-24 07:10:49 +08:00
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static void dds_init(void)
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{
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int i;
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DDS_WRITE(DDS_GPIO, 1 << 7);
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for(i=0;i<8;i++) {
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DDS_WRITE(DDS_GPIO, i);
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DDS_WRITE(0x00, 0x78);
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DDS_WRITE(0x01, 0x00);
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DDS_WRITE(0x02, 0x00);
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DDS_WRITE(0x03, 0x00);
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DDS_WRITE(DDS_FUD, 0);
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}
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}
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2014-07-06 04:47:23 +08:00
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typedef void (*kernel_function)(void);
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2014-07-04 23:49:08 +08:00
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int main(void)
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{
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unsigned char kbuf[256*1024];
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unsigned char kcode[256*1024];
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kernel_function k = (kernel_function)kcode;
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int length;
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irq_setmask(0);
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irq_setie(1);
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uart_init();
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puts("ARTIQ runtime built "__DATE__" "__TIME__"\n");
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2014-07-21 08:28:56 +08:00
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2014-07-04 23:49:08 +08:00
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while(1) {
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2014-07-16 01:21:31 +08:00
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length = ident_and_download_kernel(kbuf, sizeof(kbuf));
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2014-07-04 23:49:08 +08:00
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if(length > 0) {
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2014-07-08 01:13:43 +08:00
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if(load_elf(syscalls, kbuf, length, kcode, sizeof(kcode))) {
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flush_cpu_icache();
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2014-07-24 07:10:49 +08:00
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dds_init();
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2014-07-21 08:28:56 +08:00
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rtio_reset_write(0);
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2014-07-08 01:13:43 +08:00
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k();
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2014-07-21 08:28:56 +08:00
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rtio_reset_write(1);
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2014-07-08 01:13:43 +08:00
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send_sync();
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send_char(MSGTYPE_KERNEL_FINISHED);
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}
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2014-07-04 23:49:08 +08:00
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}
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}
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return 0;
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}
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