2014-08-28 16:56:48 +08:00
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#ifndef __DDS_H
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#define __DDS_H
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2015-03-12 20:14:06 +08:00
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#include <hw/common.h>
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2015-04-11 21:32:01 +08:00
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#include <generated/mem.h>
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2015-03-12 20:14:06 +08:00
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#define DDS_READ(addr) \
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2015-04-11 21:32:01 +08:00
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MMPTR(DDS_BASE + (addr)*4)
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2015-03-12 20:14:06 +08:00
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#define DDS_WRITE(addr, data) \
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2015-04-11 21:32:01 +08:00
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MMPTR(DDS_BASE + (addr)*4) = data
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2015-03-12 20:14:06 +08:00
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#define DDS_FTW0 0x0a
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#define DDS_FTW1 0x0b
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#define DDS_FTW2 0x0c
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#define DDS_FTW3 0x0d
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#define DDS_POW0 0x0e
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#define DDS_POW1 0x0f
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#define DDS_GPIO 0x41
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2014-08-28 16:56:48 +08:00
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void dds_init(void);
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2014-11-21 04:32:56 +08:00
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void dds_phase_clear_en(int channel, int phase_clear_en);
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void dds_program(long long int timestamp, int channel,
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2014-12-09 13:50:33 +08:00
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unsigned int ftw, unsigned int pow, unsigned int sysclk_per_microcycle,
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2014-11-21 04:32:56 +08:00
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int rt_fud, int phase_tracking);
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2014-08-28 16:56:48 +08:00
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#endif /* __DDS_H */
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