2014-07-04 23:49:08 +08:00
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#include <stdio.h>
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2014-09-15 22:40:33 +08:00
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#include <string.h>
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2014-07-04 23:49:08 +08:00
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#include <irq.h>
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#include <uart.h>
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2015-03-12 05:02:19 +08:00
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#include <console.h>
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2014-07-04 23:49:08 +08:00
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#include <system.h>
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2014-09-15 22:56:23 +08:00
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#include <time.h>
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#include <generated/csr.h>
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2015-04-22 15:01:32 +08:00
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#include <hw/flags.h>
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#ifdef CSR_ETHMAC_BASE
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#include <netif/etharp.h>
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#include <netif/liteethif.h>
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#include <lwip/init.h>
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#include <lwip/memp.h>
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#include <lwip/ip4_addr.h>
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#include <lwip/ip4.h>
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#include <lwip/netif.h>
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#include <lwip/sys.h>
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#include <lwip/tcp.h>
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#include <lwip/timers.h>
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#endif
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2014-07-04 23:49:08 +08:00
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2015-05-01 12:34:47 +08:00
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#include "flash_storage.h"
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2015-04-29 12:58:37 +08:00
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#include "clock.h"
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2015-03-12 05:02:19 +08:00
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#include "test_mode.h"
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2015-05-01 12:34:47 +08:00
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#include "kserver.h"
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2015-04-22 01:31:31 +08:00
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#include "session.h"
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2014-07-24 07:10:49 +08:00
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2015-04-22 15:01:32 +08:00
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#ifdef CSR_ETHMAC_BASE
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u32_t sys_now(void)
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{
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2015-04-29 12:58:37 +08:00
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return clock_get_ms();
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2015-04-22 15:01:32 +08:00
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}
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static struct netif netif;
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static void lwip_service(void)
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{
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sys_check_timeouts();
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if(ethmac_sram_writer_ev_pending_read() & ETHMAC_EV_SRAM_WRITER) {
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liteeth_input(&netif);
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ethmac_sram_writer_ev_pending_write(ETHMAC_EV_SRAM_WRITER);
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}
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}
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2015-05-01 12:34:47 +08:00
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unsigned char macadr[6];
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2015-04-23 23:22:40 +08:00
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2015-05-01 12:34:47 +08:00
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static int hex2nib(int c)
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2015-04-23 23:22:40 +08:00
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{
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2015-05-01 12:34:47 +08:00
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if((c >= '0') && (c <= '9'))
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return c - '0';
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if((c >= 'a') && (c <= 'f'))
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return c - 'a' + 10;
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if((c >= 'A') && (c <= 'F'))
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return c - 'A' + 10;
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return -1;
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2015-04-23 23:22:40 +08:00
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}
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2015-05-01 12:34:47 +08:00
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static void init_macadr(void)
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2015-04-23 23:22:40 +08:00
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{
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2015-05-01 12:34:47 +08:00
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static const unsigned char default_macadr[6] = {0x10, 0xe2, 0xd5, 0x32, 0x50, 0x00};
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2015-05-02 12:20:20 +08:00
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#if (defined CSR_SPIFLASH_BASE && defined SPIFLASH_PAGE_SIZE)
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2015-05-01 12:34:47 +08:00
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char b[32];
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char fs_macadr[6];
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int i, r, s;
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2015-05-02 12:20:20 +08:00
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#endif
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2015-04-23 23:22:40 +08:00
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2015-05-01 12:34:47 +08:00
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memcpy(macadr, default_macadr, 6);
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2015-05-02 12:20:20 +08:00
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#if (defined CSR_SPIFLASH_BASE && defined SPIFLASH_PAGE_SIZE)
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2015-05-01 12:34:47 +08:00
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r = fs_read("mac", b, sizeof(b) - 1, NULL);
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if(r <= 0)
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return;
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b[r] = 0;
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for(i=0;i<6;i++) {
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r = hex2nib(b[3*i]);
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s = hex2nib(b[3*i + 1]);
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if((r < 0) || (s < 0))
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return;
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fs_macadr[i] = (r << 4) | s;
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2015-04-23 23:22:40 +08:00
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}
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2015-05-01 12:34:47 +08:00
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for(i=0;i<5;i++)
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if(b[3*i + 2] != ':')
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return;
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memcpy(macadr, fs_macadr, 6);
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2015-05-02 12:20:20 +08:00
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#endif
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2015-04-23 23:22:40 +08:00
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}
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2015-05-01 12:34:47 +08:00
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static void fsip_or_default(struct ip4_addr *d, char *key, int i1, int i2, int i3, int i4)
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2015-04-23 23:22:40 +08:00
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{
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int r;
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2015-05-02 12:20:20 +08:00
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#if (defined CSR_SPIFLASH_BASE && defined SPIFLASH_PAGE_SIZE)
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2015-05-01 12:34:47 +08:00
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char cp[32];
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2015-05-02 12:20:20 +08:00
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#endif
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2015-04-23 23:22:40 +08:00
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2015-05-01 12:34:47 +08:00
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IP4_ADDR(d, i1, i2, i3, i4);
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2015-05-02 12:20:20 +08:00
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#if (defined CSR_SPIFLASH_BASE && defined SPIFLASH_PAGE_SIZE)
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2015-05-01 12:34:47 +08:00
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r = fs_read(key, cp, sizeof(cp) - 1, NULL);
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if(r <= 0)
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return;
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cp[r] = 0;
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if(!ip4addr_aton(cp, d))
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return;
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2015-05-02 12:20:20 +08:00
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#endif
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2015-04-23 23:22:40 +08:00
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}
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2015-05-01 12:34:47 +08:00
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static void network_init(void)
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2015-04-23 23:22:40 +08:00
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{
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2015-05-01 12:34:47 +08:00
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struct ip4_addr local_ip;
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struct ip4_addr netmask;
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struct ip4_addr gateway_ip;
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2015-04-23 23:22:40 +08:00
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2015-05-01 12:34:47 +08:00
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init_macadr();
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fsip_or_default(&local_ip, "ip", 192, 168, 0, 42);
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fsip_or_default(&netmask, "netmask", 255, 255, 255, 0);
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fsip_or_default(&gateway_ip, "gateway", 192, 168, 0, 1);
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2015-04-23 23:22:40 +08:00
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2015-05-01 12:34:47 +08:00
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lwip_init();
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2015-04-23 23:22:40 +08:00
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2015-05-01 12:34:47 +08:00
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netif_add(&netif, &local_ip, &netmask, &gateway_ip, 0, liteeth_init, ethernet_input);
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netif_set_default(&netif);
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netif_set_up(&netif);
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netif_set_link_up(&netif);
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2015-04-23 23:22:40 +08:00
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}
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static void regular_main(void)
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{
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2015-05-01 13:49:26 +08:00
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puts("Accepting sessions on Ethernet.");
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2015-04-29 12:58:37 +08:00
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clock_init();
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2015-04-23 23:22:40 +08:00
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network_init();
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kserver_init();
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2015-05-01 13:49:26 +08:00
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session_end();
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2015-04-23 23:22:40 +08:00
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while(1) {
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lwip_service();
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kserver_service();
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}
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}
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#else /* CSR_ETHMAC_BASE */
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2015-04-28 02:11:58 +08:00
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static void reset_serial_session(void)
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{
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int i;
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session_end();
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/* Signal end-of-session inband with zero length packet. */
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for(i=0;i<4;i++)
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uart_write(0x5a);
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for(i=0;i<4;i++)
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uart_write(0x00);
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session_start();
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}
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2015-04-23 23:22:40 +08:00
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static void serial_service(void)
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2014-09-15 22:40:33 +08:00
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{
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2015-04-22 01:31:31 +08:00
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char *txdata;
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int txlen;
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static char rxdata;
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static int rxpending;
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int r, i;
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if(!rxpending && uart_read_nonblock()) {
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rxdata = uart_read();
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rxpending = 1;
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2014-09-15 22:40:33 +08:00
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}
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2015-04-22 01:31:31 +08:00
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if(rxpending) {
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r = session_input(&rxdata, 1);
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if(r > 0)
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rxpending = 0;
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2015-04-28 02:11:58 +08:00
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if(r < 0)
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reset_serial_session();
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2014-09-15 22:40:33 +08:00
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}
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2015-04-22 01:31:31 +08:00
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session_poll((void **)&txdata, &txlen);
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if(txlen > 0) {
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for(i=0;i<txlen;i++)
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uart_write(txdata[i]);
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2015-04-23 23:22:40 +08:00
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session_ack_data(txlen);
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session_ack_mem(txlen);
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2015-04-28 02:11:58 +08:00
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} else if(txlen < 0)
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reset_serial_session();
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2015-04-05 22:04:50 +08:00
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}
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2015-04-22 01:31:31 +08:00
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static void regular_main(void)
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2014-07-04 23:49:08 +08:00
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{
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2015-05-01 13:49:26 +08:00
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puts("Accepting sessions on serial link.");
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2015-04-29 12:58:37 +08:00
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clock_init();
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2015-04-23 23:22:40 +08:00
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/* Open the session for the serial control. */
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2015-04-22 01:31:31 +08:00
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session_start();
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while(1)
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2015-04-23 23:22:40 +08:00
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serial_service();
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2014-09-15 22:40:33 +08:00
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}
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2015-04-23 23:22:40 +08:00
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#endif
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2015-04-22 01:31:31 +08:00
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2014-09-15 22:56:23 +08:00
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static void blink_led(void)
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{
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int i, ev, p;
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p = identifier_frequency_read()/10;
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time_init();
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for(i=0;i<3;i++) {
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leds_out_write(1);
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while(!elapsed(&ev, p));
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leds_out_write(0);
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while(!elapsed(&ev, p));
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}
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}
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2015-03-12 05:02:19 +08:00
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static int check_test_mode(void)
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{
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char c;
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timer0_en_write(0);
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timer0_reload_write(0);
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timer0_load_write(identifier_frequency_read() >> 2);
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timer0_en_write(1);
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timer0_update_value_write(1);
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while(timer0_value_read()) {
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if(readchar_nonblock()) {
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c = readchar();
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if((c == 't')||(c == 'T'))
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return 1;
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}
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timer0_update_value_write(1);
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}
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return 0;
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}
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2014-09-15 22:40:33 +08:00
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int main(void)
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{
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2014-09-05 12:03:22 +08:00
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irq_setmask(0);
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irq_setie(1);
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uart_init();
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2014-09-22 13:18:48 +08:00
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2015-04-28 00:18:54 +08:00
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puts("ARTIQ runtime built "__DATE__" "__TIME__"\n");
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2015-04-23 23:22:40 +08:00
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puts("Press 't' to enter test mode...");
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2014-09-15 22:56:23 +08:00
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blink_led();
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2015-03-12 05:02:19 +08:00
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if(check_test_mode()) {
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puts("Entering test mode.");
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test_main();
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} else {
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puts("Entering regular mode.");
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2015-04-22 01:31:31 +08:00
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regular_main();
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2015-03-12 05:02:19 +08:00
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}
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2014-09-05 12:03:22 +08:00
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return 0;
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2014-07-04 23:49:08 +08:00
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}
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