2014-08-28 16:56:48 +08:00
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#ifndef __DDS_H
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#define __DDS_H
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2015-03-12 20:14:06 +08:00
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#include <hw/common.h>
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2015-04-11 21:32:01 +08:00
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#include <generated/mem.h>
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2015-03-12 20:14:06 +08:00
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2015-05-09 17:11:34 +08:00
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/* Number of DDS channels to initialize */
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#define DDS_CHANNEL_COUNT 8
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2015-05-08 16:51:54 +08:00
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/* Maximum number of commands in a batch */
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#define DDS_MAX_BATCH 16
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/* DDS core registers */
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2015-03-12 20:14:06 +08:00
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#define DDS_FTW0 0x0a
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#define DDS_FTW1 0x0b
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#define DDS_FTW2 0x0c
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#define DDS_FTW3 0x0d
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#define DDS_POW0 0x0e
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#define DDS_POW1 0x0f
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2015-05-08 14:44:39 +08:00
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#define DDS_FUD 0x40
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2015-03-12 20:14:06 +08:00
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#define DDS_GPIO 0x41
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2015-05-08 14:44:39 +08:00
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enum {
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PHASE_MODE_CONTINUOUS = 0,
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PHASE_MODE_ABSOLUTE = 1,
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PHASE_MODE_TRACKING = 2
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};
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2015-05-09 17:11:34 +08:00
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void dds_init_all(void);
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2015-05-08 14:44:39 +08:00
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void dds_init(long long int timestamp, int channel);
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2015-05-08 16:51:54 +08:00
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void dds_batch_enter(long long int timestamp);
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void dds_batch_exit(void);
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2015-05-08 14:44:39 +08:00
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void dds_set(long long int timestamp, int channel,
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unsigned int ftw, unsigned int pow, int phase_mode);
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2014-08-28 16:56:48 +08:00
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#endif /* __DDS_H */
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