2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-05 01:36:39 +08:00
artiq/examples/sim/simple_simulation.py

35 lines
763 B
Python
Raw Normal View History

2014-09-30 17:38:02 +08:00
from artiq import *
2014-06-18 19:43:09 +08:00
2014-09-05 12:03:22 +08:00
2015-07-14 04:08:20 +08:00
class SimpleSimulation(EnvExperiment):
"""Simple simulation"""
2015-07-14 04:08:20 +08:00
def build(self):
2015-10-04 00:18:21 +08:00
self.setattr_device("core")
2015-07-14 04:08:20 +08:00
for wo in "abcd":
2015-10-04 00:18:21 +08:00
self.setattr_device(wo)
2014-09-05 12:03:22 +08:00
@kernel
def run(self):
with parallel:
with sequential:
self.a.pulse(100*MHz, 20*us)
self.b.pulse(200*MHz, 20*us)
with sequential:
self.c.pulse(300*MHz, 10*us)
self.d.pulse(400*MHz, 20*us)
2014-06-18 19:43:09 +08:00
2014-10-05 16:24:21 +08:00
def main():
2015-07-14 04:08:20 +08:00
from artiq.sim import devices
dmgr = dict()
dmgr["core"] = devices.Core(dmgr)
for wo in "abcd":
dmgr[wo] = devices.WaveOutput(dmgr, wo)
exp = SimpleSimulation(dmgr)
2014-09-05 12:03:22 +08:00
exp.run()
2014-10-05 16:24:21 +08:00
if __name__ == "__main__":
main()