2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-27 04:08:27 +08:00
artiq/examples/sim/simple_simulation.py

39 lines
857 B
Python
Raw Normal View History

2014-09-30 17:38:02 +08:00
from artiq import *
2014-06-18 19:43:09 +08:00
2014-09-05 12:03:22 +08:00
class SimpleSimulation(AutoDB):
__artiq_unit__ = "Simple simulation"
class DBKeys:
a = Device()
b = Device()
c = Device()
d = Device()
2014-09-05 12:03:22 +08:00
@kernel
def run(self):
with parallel:
with sequential:
self.a.pulse(100*MHz, 20*us)
self.b.pulse(200*MHz, 20*us)
with sequential:
self.c.pulse(300*MHz, 10*us)
self.d.pulse(400*MHz, 20*us)
2014-06-18 19:43:09 +08:00
2014-10-05 16:24:21 +08:00
def main():
2014-09-05 12:03:22 +08:00
from artiq.sim import devices as sd
2014-06-18 19:43:09 +08:00
core = sd.Core()
2014-09-05 12:03:22 +08:00
exp = SimpleSimulation(
core=core,
a=sd.WaveOutput(core=core, name="a"),
b=sd.WaveOutput(core=core, name="b"),
c=sd.WaveOutput(core=core, name="c"),
d=sd.WaveOutput(core=core, name="d"),
2014-09-05 12:03:22 +08:00
)
exp.run()
2014-10-05 16:24:21 +08:00
if __name__ == "__main__":
main()