Add ebaz4205 support #327
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@ -11,7 +11,9 @@ use super::{cache,
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core1::rtio_get_destination_status,
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dma, linalg,
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rpc::{rpc_recv, rpc_send, rpc_send_async}};
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use crate::{eh_artiq, i2c, rtio};
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use crate::{eh_artiq, rtio};
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#[cfg(not(feature = "target_ebaz4205"))]
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use crate::i2c;
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extern "C" {
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fn vsnprintf_(buffer: *mut c_char, count: size_t, format: *const c_char, va: VaList) -> c_int;
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@ -109,11 +111,17 @@ pub fn resolve(required: &[u8]) -> Option<u32> {
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api!(cache_put = cache::put),
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// i2c
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#[cfg(not(feature = "target_ebaz4205"))]
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api!(i2c_start = i2c::start),
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#[cfg(not(feature = "target_ebaz4205"))]
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api!(i2c_restart = i2c::restart),
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#[cfg(not(feature = "target_ebaz4205"))]
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api!(i2c_stop = i2c::stop),
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#[cfg(not(feature = "target_ebaz4205"))]
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api!(i2c_write = i2c::write),
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#[cfg(not(feature = "target_ebaz4205"))]
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api!(i2c_read = i2c::read),
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#[cfg(not(feature = "target_ebaz4205"))]
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newell marked this conversation as resolved
Outdated
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api!(i2c_switch_select = i2c::switch_select),
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// subkernel
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@ -21,6 +21,7 @@ pub use pl::csr::rtio_core;
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use void::Void;
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pub mod eh_artiq;
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#[cfg(not(feature = "target_ebaz4205"))]
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pub mod i2c;
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pub mod irq;
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pub mod kernel;
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@ -100,6 +100,7 @@ pub fn main_core0() {
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info!("gateware ident: {}", identifier_read(&mut [0; 64]));
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#[cfg(not(feature = "target_ebaz4205"))]
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ksupport::i2c::init();
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#[cfg(feature = "target_kasli_soc")]
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{
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@ -69,7 +69,7 @@ fn get_rtio_clock_cfg(cfg: &Config) -> RtioClock {
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res
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}
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#[cfg(not(has_drtio))]
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#[cfg(not(any(has_drtio, feature = "target_ebaz4205")))]
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fn init_rtio(timer: &mut GlobalTimer) {
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info!("Switching SYS clocks...");
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unsafe {
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@ -429,7 +429,7 @@ pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
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#[cfg(has_drtio)]
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init_drtio(timer);
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#[cfg(not(has_drtio))]
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#[cfg(not(any(has_drtio, feature = "target_ebaz4205")))]
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init_rtio(timer);
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#[cfg(all(has_si549, has_wrpll))]
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Reference in New Issue
Might be simpler to either (1) add a dummy module with I2C functions that always return error/false, or (2) dedicate two I/O pins on the board to I2C since many use cases will want it anyway.
I am open to either option. Note that if I did go with (2), dedicating two I/O pins, I would need to update
zynq-rs
for this as well. What do you deem the better option?Another
zynq-rs
update is not a problem, but if it's too contrived, you may go with dummies for now and add I2C support later.