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WRPLL: refactor to use artiq's WRPLL gateware #300

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sb10q merged 1 commits from morgan/artiq-zynq:refactor_wrpll into master 2024-08-17 17:37:23 +08:00
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morgan commented 2024-05-30 15:48:51 +08:00
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Summary

  • flake update for the wrpll gateware on artiq
  • refactor kasli_soc.py to use the wrpll gateware from artiq
  • remove redundant wrpll gateware files
## Summary - flake update for the `wrpll` gateware on artiq - refactor `kasli_soc.py` to use the `wrpll` gateware from artiq - remove redundant wrpll gateware files
morgan added 3 commits 2024-05-30 15:48:51 +08:00
morgan changed title from WRPLL gatware: refactor to WRPLL: refactor to use artiq's WRPLL gateware 2024-05-30 15:49:29 +08:00
sb10q merged commit 586fd2f17e into master 2024-05-31 08:34:40 +08:00
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Reference: M-Labs/artiq-zynq#300
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