M-Labs/artiq-zynq
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RTIO PLL fixes #183

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sb10q merged 1 commits from mwojcik/artiq-zynq:rtio_pll_fixes into master 2024-08-17 17:37:22 +08:00
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mwojcik commented 2022-04-12 13:48:55 +08:00
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As mentioned in #181 this PR removes the PLL loop allowing the rest (including networking) to set up so firmware can still be changed.

Additionally I found that in satellite rtio crg was not initialised properly either - it was missing has_rtio_crg cfg param.

As mentioned in #181 this PR removes the PLL loop allowing the rest (including networking) to set up so firmware can still be changed. Additionally I found that in satellite rtio crg was not initialised properly either - it was missing ``has_rtio_crg`` cfg param.
mwojcik added 2 commits 2022-04-12 13:48:55 +08:00
sb10q merged commit 3cf86a6335 into master 2022-04-12 14:19:00 +08:00
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Reference: M-Labs/artiq-zynq#183
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