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compilers
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rust: add riscv32i
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2019-04-09 00:48:19 +08:00 |
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cores
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add VexRiscv
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2019-04-05 18:58:11 +08:00 |
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eda
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nmigen: run tests in verbose mode
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2019-04-17 16:08:37 +08:00 |
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examples
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minor cleanup
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2019-03-25 23:41:22 +08:00 |
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heavycomps
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roundrobin: use nmigen zero-width signals
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2019-04-18 11:58:51 +08:00 |
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.gitignore
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add nix-build results to .gitignore
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2019-03-25 23:36:52 +08:00 |
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default.nix
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style
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2019-04-04 23:43:46 +08:00 |
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derivations.nix
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rust: add riscv32i
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2019-04-09 00:48:19 +08:00 |
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heavycomps.nix
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add component library with UART
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2019-03-19 16:52:02 +08:00 |
Sebastien Bourdeauducq
2bd819fcbe