 Harry Ho
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353b34a135
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implement UART, Timer, SPI Flash & Eth RGMII cores
* These implementations use Harry's proposal for nmigen-stdio & nmigen-soc
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2020-03-02 19:55:22 +08:00 |
 Sebastien Bourdeauducq
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12032433ed
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use nixpkgs 19.03
* too much breakage on nixos-unstable
* we should track upstream yosys/nextpnr more closely than nixpkgs does
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2019-07-29 14:58:46 +08:00 |
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Sebastien Bourdeauducq
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af51f6fe8f
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use nmigen build system, upstream yosys, reorganize
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2019-07-03 18:51:54 +08:00 |
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Sebastien Bourdeauducq
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a203307108
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reorganize
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2019-06-06 17:25:11 +08:00 |
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Sebastien Bourdeauducq
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b6c53406ea
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show LLVM in hydra
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2019-06-06 12:24:48 +08:00 |
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Sebastien Bourdeauducq
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3edb51a646
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fix syntax issue
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2019-06-06 12:12:40 +08:00 |
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Sebastien Bourdeauducq
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85f7b2bf15
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use overlay instead of passing llvm/rustc/cargo around
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2019-06-06 12:05:48 +08:00 |
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Sebastien Bourdeauducq
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7ffce5882e
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add simplesoc_ecp5 to continuous build
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2019-05-02 12:54:57 +08:00 |
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Sebastien Bourdeauducq
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263b04245e
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add continuous build for helloworld examples
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2019-04-26 18:27:06 +08:00 |
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Sebastien Bourdeauducq
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38ccee5c01
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reorganize Nix files to expose lib functions and derivations properly
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2019-03-25 16:07:50 +08:00 |