 Harry Ho
|
353b34a135
|
implement UART, Timer, SPI Flash & Eth RGMII cores
* These implementations use Harry's proposal for nmigen-stdio & nmigen-soc
|
2020-03-02 19:55:22 +08:00 |
 Sebastien Bourdeauducq
|
87acbacf87
|
firmware: prevent Nix from corrupting output ELF
|
2019-07-29 13:58:21 +08:00 |
|
Sebastien Bourdeauducq
|
630048ae5f
|
gitea doesn't like rst
|
2019-06-10 14:51:07 +08:00 |
|
Sebastien Bourdeauducq
|
d9b42a0807
|
clean up firmware compilation
|
2019-06-09 00:05:40 +08:00 |
|
Sebastien Bourdeauducq
|
fd05fa560f
|
firmware: compile for riscv32i
|
2019-06-08 23:01:37 +08:00 |
|
Sebastien Bourdeauducq
|
8388018db7
|
also build riscv64 binutils
|
2019-06-08 19:25:38 +08:00 |
|
Sebastien Bourdeauducq
|
2cfafcdf20
|
firmware: match simplesoc memory addresses
|
2019-06-07 23:17:03 +08:00 |
|
Sebastien Bourdeauducq
|
63664ab959
|
build .bin firmware image
|
2019-06-06 17:17:45 +08:00 |
|
Sebastien Bourdeauducq
|
d2391e0aa1
|
build firmware with Nix
|
2019-06-06 13:19:17 +08:00 |
|
Sebastien Bourdeauducq
|
78f67f82d3
|
firmware: simulable demo
Run:
qemu-system-riscv32 -nographic -machine sifive_u -kernel target/riscv32imc-unknown-none-elf/release/helloworld
|
2019-06-06 10:33:29 +08:00 |
|
Sebastien Bourdeauducq
|
b5ac2e7303
|
add simple Rust firmware (WIP)
|
2019-06-06 00:12:17 +08:00 |