2019-03-25 16:07:50 +08:00
|
|
|
{ pkgs }:
|
2019-04-01 11:05:08 +08:00
|
|
|
rec {
|
|
|
|
yosys = pkgs.callPackage ./eda/yosys.nix {};
|
2019-03-25 16:07:50 +08:00
|
|
|
symbiyosys = pkgs.symbiyosys.override { inherit yosys; };
|
2019-04-01 11:05:08 +08:00
|
|
|
nmigen = pkgs.callPackage ./eda/nmigen.nix { inherit yosys; };
|
2019-04-04 23:44:07 +08:00
|
|
|
scala-spinalhdl = pkgs.callPackage ./eda/scala-spinalhdl.nix {};
|
2019-04-01 11:05:08 +08:00
|
|
|
|
|
|
|
jtagtap = pkgs.callPackage ./cores/jtagtap.nix { inherit nmigen; };
|
|
|
|
minerva = pkgs.callPackage ./cores/minerva.nix { inherit nmigen; inherit jtagtap; };
|
2019-04-05 18:58:11 +08:00
|
|
|
vexriscv-small = pkgs.callPackage ./cores/vexriscv.nix {
|
|
|
|
inherit scala-spinalhdl;
|
|
|
|
name = "vexriscv-small";
|
|
|
|
scalaToRun = "vexriscv.demo.GenSmallAndProductive";
|
|
|
|
};
|
2019-04-01 11:05:08 +08:00
|
|
|
|
2019-03-25 16:07:50 +08:00
|
|
|
heavycomps = pkgs.callPackage ./heavycomps.nix { inherit nmigen; };
|
2019-04-01 11:05:08 +08:00
|
|
|
|
|
|
|
binutils-riscv = pkgs.callPackage ./compilers/binutils.nix { platform = "riscv32"; };
|
2019-04-09 00:09:58 +08:00
|
|
|
llvm = pkgs.llvm_7.overrideAttrs(oa: {
|
|
|
|
cmakeFlags = oa.cmakeFlags ++ ["-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=RISCV"];
|
|
|
|
});
|
|
|
|
rustc = pkgs.rustc.override { inherit llvm; };
|
|
|
|
riscv32imc-crates = pkgs.callPackage ./compilers/riscv32imc-crates.nix { inherit rustc; };
|
2019-03-25 16:07:50 +08:00
|
|
|
}
|