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topquark12 2021-07-13 10:22:23 +08:00
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.gitignore vendored Normal file
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# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv

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(module "Banana Socket" (layer F.Cu) (tedit 6073ECF0)
(fp_text reference REF** (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "Banana Socket" (at 0 -6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.45 -4.9) (end 17.45 -4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start -3.45 4.9) (end 17.45 4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start 17.45 4.9) (end 17.45 -4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start -3.45 4.9) (end -3.45 -4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start -3.45 -4.9) (end 17.45 -4.9) (layer F.SilkS) (width 0.12))
(fp_line (start -3.45 4.9) (end -3.45 -4.9) (layer F.SilkS) (width 0.12))
(fp_line (start 17.45 4.9) (end 17.45 -4.9) (layer F.SilkS) (width 0.12))
(fp_line (start -3.45 4.9) (end 17.45 4.9) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 0 0) (size 4 4) (drill 2) (layers *.Cu *.Mask))
(pad 1 thru_hole circle (at 15.3 0) (size 4 4) (drill 2) (layers *.Cu *.Mask))
)

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GAN-Power-Stage-Test-cache.lib Normal file
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Generic_Conn_01x02
#
DEF Connector_Generic_Conn_01x02 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Generic_Conn_01x02" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 50 50 -150 1 1 10 f
X Pin_1 1 -200 0 150 R 50 50 1 1 P
X Pin_2 2 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x05_Odd_Even
#
DEF Connector_Generic_Conn_02x05_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 300 50 H V C CNN
F1 "Connector_Generic_Conn_02x05_Odd_Even" 50 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 150 -250 1 1 10 f
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_10 10 300 -200 150 L 50 50 1 1 P
X Pin_2 2 300 200 150 L 50 50 1 1 P
X Pin_3 3 -200 100 150 R 50 50 1 1 P
X Pin_4 4 300 100 150 L 50 50 1 1 P
X Pin_5 5 -200 0 150 R 50 50 1 1 P
X Pin_6 6 300 0 150 L 50 50 1 1 P
X Pin_7 7 -200 -100 150 R 50 50 1 1 P
X Pin_8 8 300 -100 150 L 50 50 1 1 P
X Pin_9 9 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_TestPoint
#
DEF Connector_TestPoint TP 0 30 N N 1 F N
F0 "TP" 0 270 50 H V C CNN
F1 "Connector_TestPoint" 0 200 50 H V C CNN
F2 "" 200 0 50 H I C CNN
F3 "" 200 0 50 H I C CNN
$FPLIST
Pin*
Test*
$ENDFPLIST
DRAW
C 0 130 30 0 1 0 N
X 1 1 0 0 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_L
#
DEF Device_L L 0 40 N N 1 F N
F0 "L" -50 0 50 V V C CNN
F1 "Device_L" 75 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Choke_*
*Coil*
Inductor_*
L_*
$ENDFPLIST
DRAW
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
A 0 25 25 -899 899 0 1 0 N 0 0 0 50
A 0 75 25 -899 899 0 1 0 N 0 50 0 100
X 1 1 0 150 50 D 50 50 1 1 P
X 2 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Diode_BYV79-100
#
DEF Diode_BYV79-100 D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Diode_BYV79-100" 0 -100 50 H V C CNN
F2 "Package_TO_SOT_THT:TO-220-2_Vertical" 0 -175 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS BYV79-200 BYV79-150
$FPLIST
TO?220*
$ENDFPLIST
DRAW
P 2 0 1 10 -50 50 -50 -50 N
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GAN-Power-Stage-Test_PL160
#
DEF GAN-Power-Stage-Test_PL160 TR 0 0 N Y 1 F N
F0 "TR" 0 390 50 H V C CNN
F1 "GAN-Power-Stage-Test_PL160" 150 -600 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H V C CNN
DRAW
A -80 30 30 -899 899 0 1 8 N -80 0 -80 60
A -80 90 30 -899 899 0 1 8 N -80 60 -80 120
A -80 150 30 -899 899 0 1 8 N -80 120 -80 180
A -80 210 30 -899 899 0 1 8 N -80 180 -80 240
A 60 -260 30 901 -901 0 1 8 N 60 -230 60 -290
A 60 -200 30 901 -901 0 1 8 N 60 -170 60 -230
A 60 -140 30 901 -901 0 1 8 N 60 -110 60 -170
A 60 140 30 901 -901 0 1 8 N 60 170 60 110
A 60 200 30 901 -901 0 1 8 N 60 230 60 170
A 60 260 30 901 -901 0 1 8 N 60 290 60 230
A -80 -420 30 -899 899 1 1 8 N -80 -450 -80 -390
A -80 -360 30 -899 899 1 1 8 N -80 -390 -80 -330
A -80 -300 30 -899 899 1 1 8 N -80 -330 -80 -270
A -80 -240 30 -899 899 1 1 8 N -80 -270 -80 -210
A 60 -460 30 901 -901 1 1 8 N 60 -430 60 -490
A 60 -400 30 901 -901 1 1 8 N 60 -370 60 -430
A 60 -340 30 901 -901 1 1 8 N 60 -310 60 -370
A 60 -60 30 901 -901 1 1 8 N 60 -30 60 -90
A 60 0 30 901 -901 1 1 8 N 60 30 60 -30
A 60 60 30 901 -901 1 1 8 N 60 90 60 30
C 90 140 14 0 1 6 N
C -120 -195 14 1 1 6 N
C -120 260 14 1 1 6 N
C 90 -460 14 1 1 6 N
C 90 -260 14 1 1 6 N
C 90 -60 14 1 1 6 N
P 2 0 1 6 -80 -10 -80 0 N
P 2 0 1 39 0 300 0 -500 N
P 3 0 1 6 -100 -500 -80 -500 -80 -450 N
P 3 0 1 6 -100 -150 -80 -150 -80 -210 N
P 3 0 1 6 -100 -50 -80 -50 -80 -10 N
P 3 0 1 6 -100 300 -80 300 -80 240 N
P 3 0 1 0 60 -290 60 -300 60 -300 F
P 3 0 1 0 60 -100 60 -110 60 -110 F
P 3 0 1 0 60 -100 100 -100 100 -100 N
P 3 0 1 0 60 100 60 110 60 110 F
P 3 0 1 0 60 100 100 100 100 100 N
P 3 0 1 0 60 300 60 290 60 290 F
P 3 0 1 0 60 300 100 300 100 300 N
P 3 0 1 0 100 -300 60 -300 60 -300 N
P 3 1 1 0 60 -490 60 -500 60 -500 F
P 3 1 1 0 60 -300 60 -310 60 -310 F
P 3 1 1 0 60 -300 100 -300 100 -300 N
P 3 1 1 0 60 -90 60 -100 60 -100 F
P 3 1 1 0 60 100 60 90 60 90 F
P 3 1 1 0 60 100 100 100 100 100 N
P 3 1 1 0 100 -500 60 -500 60 -500 N
P 3 1 1 0 100 -100 60 -100 60 -100 N
X ~ 10 200 100 100 L 50 50 1 1 P
X ~ 11 200 300 100 L 50 50 1 1 P
X ~ 2 -200 300 100 R 50 50 1 1 P
X ~ 3 -200 -150 100 R 50 50 1 1 P
X ~ 4 -200 -50 100 R 50 50 1 1 P
X ~ 5 -200 -500 100 R 50 50 1 1 P
X ~ 7 200 -500 100 L 50 50 1 1 P
X ~ 8 200 -300 100 L 50 50 1 1 P
X ~ 9 200 -100 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Power_Management_LMG5200
#
DEF Power_Management_LMG5200 Q 0 10 Y Y 1 F N
F0 "Q" 250 200 50 H V L CNN
F1 "Power_Management_LMG5200" 250 100 50 H V L CNN
F2 "Package_DFN_QFN:Texas_MOF0009A" 0 0 50 H I C CIN
F3 "" 0 0 50 H I L CNN
$FPLIST
Texas*MOF0009A*
$ENDFPLIST
DRAW
C 100 -270 11 0 1 0 F
C 100 0 11 0 1 0 F
C 100 130 11 0 1 0 F
S -200 400 200 -400 0 1 10 f
P 2 0 1 0 -50 -200 10 -200 N
P 2 0 1 0 -50 200 10 200 N
P 2 0 1 0 -50 400 -50 -400 N
P 2 0 1 0 30 -270 100 -270 N
P 2 0 1 10 30 -250 30 -290 N
P 2 0 1 10 30 -180 30 -220 N
P 2 0 1 10 30 -110 30 -150 N
P 2 0 1 0 30 130 100 130 N
P 2 0 1 10 30 150 30 110 N
P 2 0 1 10 30 220 30 180 N
P 2 0 1 10 30 290 30 250 N
P 2 0 1 0 200 0 100 0 N
P 3 0 1 10 10 -125 10 -275 10 -275 N
P 3 0 1 10 10 275 10 125 10 125 N
P 3 0 1 0 30 270 100 270 100 400 N
P 3 0 1 0 100 -400 100 -200 30 -200 N
P 4 0 1 0 30 200 100 200 100 -130 30 -130 N
P 4 0 1 0 40 -200 80 -185 80 -215 40 -200 F
P 4 0 1 0 40 200 80 215 80 185 40 200 F
X ~ 1 100 500 100 D 50 50 1 1 P
X HB 2 -300 200 100 R 50 50 1 1 P
X HS 3 -300 100 100 R 50 50 1 1 P
X HI 4 -300 0 100 R 50 50 1 1 I
X LI 5 -300 -100 100 R 50 50 1 1 I
X VCC 6 -100 500 100 D 50 50 1 1 W
X AGND 7 -100 -500 100 U 50 50 1 1 W
X ~ 8 300 0 100 L 50 50 1 1 P
X ~ 9 100 -500 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+12V
#
DEF power_+12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+12V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_PWR_FLAG
#
DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 75 50 H I C CNN
F1 "power_PWR_FLAG" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
X pwr 1 0 0 0 U 50 50 0 0 w
ENDDRAW
ENDDEF
#
#End Library

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EESchema-DOCLIB Version 2.0
#
$CMP PL160
F https://www.coilcraft.com/getmedia/2a17d20e-ce43-41cf-8df1-58b60bcf2330/pl160.pdf
$ENDCMP
#
#End Doc Library

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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# PL160
#
DEF PL160 TR 0 0 N Y 1 F N
F0 "TR" 0 390 50 H V C CNN
F1 "PL160" 150 -600 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H V C CNN
DRAW
A -80 30 30 -899 899 0 1 8 N -80 0 -80 60
A -80 90 30 -899 899 0 1 8 N -80 60 -80 120
A -80 150 30 -899 899 0 1 8 N -80 120 -80 180
A -80 210 30 -899 899 0 1 8 N -80 180 -80 240
A 60 -260 30 901 -901 0 1 8 N 60 -230 60 -290
A 60 -200 30 901 -901 0 1 8 N 60 -170 60 -230
A 60 -140 30 901 -901 0 1 8 N 60 -110 60 -170
A 60 140 30 901 -901 0 1 8 N 60 170 60 110
A 60 200 30 901 -901 0 1 8 N 60 230 60 170
A 60 260 30 901 -901 0 1 8 N 60 290 60 230
A -80 -420 30 -899 899 1 1 8 N -80 -450 -80 -390
A -80 -360 30 -899 899 1 1 8 N -80 -390 -80 -330
A -80 -300 30 -899 899 1 1 8 N -80 -330 -80 -270
A -80 -240 30 -899 899 1 1 8 N -80 -270 -80 -210
A 60 -460 30 901 -901 1 1 8 N 60 -430 60 -490
A 60 -400 30 901 -901 1 1 8 N 60 -370 60 -430
A 60 -340 30 901 -901 1 1 8 N 60 -310 60 -370
A 60 -60 30 901 -901 1 1 8 N 60 -30 60 -90
A 60 0 30 901 -901 1 1 8 N 60 30 60 -30
A 60 60 30 901 -901 1 1 8 N 60 90 60 30
C 90 140 14 0 1 6 N
C -120 -195 14 1 1 6 N
C -120 260 14 1 1 6 N
C 90 -460 14 1 1 6 N
C 90 -260 14 1 1 6 N
C 90 -60 14 1 1 6 N
P 2 0 1 6 -80 -10 -80 0 N
P 2 0 1 39 0 300 0 -500 N
P 3 0 1 6 -100 -500 -80 -500 -80 -450 N
P 3 0 1 6 -100 -150 -80 -150 -80 -210 N
P 3 0 1 6 -100 -50 -80 -50 -80 -10 N
P 3 0 1 6 -100 300 -80 300 -80 240 N
P 3 0 1 0 60 -290 60 -300 60 -300 F
P 3 0 1 0 60 -100 60 -110 60 -110 F
P 3 0 1 0 60 -100 100 -100 100 -100 N
P 3 0 1 0 60 100 60 110 60 110 F
P 3 0 1 0 60 100 100 100 100 100 N
P 3 0 1 0 60 300 60 290 60 290 F
P 3 0 1 0 60 300 100 300 100 300 N
P 3 0 1 0 100 -300 60 -300 60 -300 N
P 3 1 1 0 60 -490 60 -500 60 -500 F
P 3 1 1 0 60 -300 60 -310 60 -310 F
P 3 1 1 0 60 -300 100 -300 100 -300 N
P 3 1 1 0 60 -90 60 -100 60 -100 F
P 3 1 1 0 60 100 60 90 60 90 F
P 3 1 1 0 60 100 100 100 100 100 N
P 3 1 1 0 100 -500 60 -500 60 -500 N
P 3 1 1 0 100 -100 60 -100 60 -100 N
X ~ 10 200 100 100 L 50 50 1 1 P
X ~ 11 200 300 100 L 50 50 1 1 P
X ~ 2 -200 300 100 R 50 50 1 1 P
X ~ 3 -200 -150 100 R 50 50 1 1 P
X ~ 4 -200 -50 100 R 50 50 1 1 P
X ~ 5 -200 -500 100 R 50 50 1 1 P
X ~ 7 200 -500 100 L 50 50 1 1 P
X ~ 8 200 -300 100 L 50 50 1 1 P
X ~ 9 200 -100 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library

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GAN-Power-Stage-Test.pretty/BananaSocket.kicad_mod Normal file
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(module BananaSocket (layer F.Cu) (tedit 6073ECF0)
(fp_text reference REF** (at 0 -3.81) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value BananaSocket (at 0 -6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.45 -4.9) (end 17.45 -4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start -3.45 4.9) (end 17.45 4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start 17.45 4.9) (end 17.45 -4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start -3.45 4.9) (end -3.45 -4.9) (layer F.CrtYd) (width 0.12))
(fp_line (start -3.45 -4.9) (end 17.45 -4.9) (layer F.SilkS) (width 0.12))
(fp_line (start -3.45 4.9) (end -3.45 -4.9) (layer F.SilkS) (width 0.12))
(fp_line (start 17.45 4.9) (end 17.45 -4.9) (layer F.SilkS) (width 0.12))
(fp_line (start -3.45 4.9) (end 17.45 4.9) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 15.3 0) (size 4 4) (drill 2) (layers *.Cu *.Mask))
(pad 1 thru_hole circle (at 0 0) (size 4 4) (drill 2) (layers *.Cu *.Mask))
)

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GAN-Power-Stage-Test.pretty/PL160.kicad_mod Normal file
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(module PL160 (layer F.Cu) (tedit 60E81296)
(fp_text reference REF** (at 6.096 11.684) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value PL160 (at 6.096 10.16) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -11.176 -9.144) (end -11.176 9.144) (layer F.CrtYd) (width 0.12))
(fp_line (start -11.176 9.144) (end 11.684 9.144) (layer F.CrtYd) (width 0.12))
(fp_line (start 11.684 9.144) (end 11.684 -9.144) (layer F.CrtYd) (width 0.12))
(fp_line (start 11.684 -9.144) (end -11.176 -9.144) (layer F.CrtYd) (width 0.12))
(fp_line (start -8.128 -8.128) (end -8.128 8.128) (layer F.SilkS) (width 0.12))
(fp_line (start -8.128 8.128) (end 7.62 8.128) (layer F.SilkS) (width 0.12))
(fp_line (start 7.62 8.128) (end 7.62 -7.62) (layer F.SilkS) (width 0.12))
(fp_line (start 7.62 -7.62) (end 7.62 -8.128) (layer F.SilkS) (width 0.12))
(fp_line (start 7.62 -8.128) (end -8.128 -8.128) (layer F.SilkS) (width 0.12))
(pad 1 smd circle (at -9.91 -7.875) (size 2.03 2.03) (layers F.Cu F.Paste F.Mask))
(pad 2 smd circle (at -9.91 -5.08) (size 2.03 2.03) (layers F.Cu F.Paste F.Mask))
(pad 3 smd circle (at -9.91 -2.285) (size 2.03 2.03) (layers F.Cu F.Paste F.Mask))
(pad 4 smd circle (at -9.91 2.285) (size 2.03 2.03) (layers F.Cu F.Paste F.Mask))
(pad 5 smd circle (at -9.91 5.08) (size 2.03 2.03) (layers F.Cu F.Paste F.Mask))
(pad 6 smd circle (at -9.91 7.875) (size 2.03 2.03) (layers F.Cu F.Paste F.Mask))
(pad 7 smd circle (at 9.91 6.35) (size 2.79 2.79) (layers F.Cu F.Paste F.Mask))
(pad 8 smd circle (at 9.91 3.175) (size 2.79 2.79) (layers F.Cu F.Paste F.Mask))
(pad 9 smd circle (at 9.91 0) (size 2.79 2.79) (layers F.Cu F.Paste F.Mask))
(pad 10 smd circle (at 9.91 -3.175) (size 2.79 2.79) (layers F.Cu F.Paste F.Mask))
(pad 11 smd circle (at 9.91 -6.35) (size 2.79 2.79) (layers F.Cu F.Paste F.Mask))
)

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update=Mon 12 Jul 2021 01:35:32 PM HKT
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.08889999999999999
MinViaDiameter=0.4
MinViaDrill=0.25
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.254
TrackWidth1=0.25
TrackWidth2=0.146812
TrackWidth3=0.254
TrackWidth4=0.508
TrackWidth5=1.27
ViaDiameter1=0.8
ViaDrill1=0.4
ViaDiameter2=0.4
ViaDrill2=0.25
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
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T2
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X208.661Y-162.306
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T3
X162.941Y-133.096
X162.941Y-145.288
X183.261Y-150.622
X195.834Y-157.099
X205.105Y-130.175
X205.105Y-135.001
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X217.551Y-146.558
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T4
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X168.91Y-130.81
X168.91Y-135.89
T5
X152.527Y-136.478
X152.527Y-141.478
X216.408Y-132.414
X216.408Y-137.414
T0
M30

164
productionFiles/GAN-Power-Stage-Test-job.gbrjob Normal file
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3
sym-lib-table Normal file
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(sym_lib_table
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