From e045837b67c6469aaf35d06dca56baf1c2b8e02f Mon Sep 17 00:00:00 2001
From: mwojcik <mw@m-labs.hk>
Date: Mon, 29 Nov 2021 12:48:45 +0800
Subject: [PATCH] zc706: not actually ultrascale

---
 src/gateware/zc706.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py
index eb077f4a..aceb2e94 100755
--- a/src/gateware/zc706.py
+++ b/src/gateware/zc706.py
@@ -399,7 +399,7 @@ class _SatelliteBase(SoCCore):
         self.submodules.siphaser = SiPhaser7Series(
             si5324_clkin=platform.request("si5324_clkin"),
             rx_synchronizer=self.rx_synchronizer,
-            ultrascale=True,
+            ultrascale=False,
             rtio_clk_freq=self.drtio_transceiver.rtio_clk_freq)
         platform.add_false_path_constraints(
             self.ps7.cd_sys.clk, self.siphaser.mmcm_freerun_output)