forked from M-Labs/artiq-zynq
pca006132
04437e876c
According to the TRM, the buffer should be 64B aligned. Without the alignment would cause failure for the DMA transaction. It seems that the allocator would give some alignment, but to be more correct we should specify that with the alloc interface. |
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.. | ||
.cargo | ||
gateware | ||
include | ||
libc | ||
libconfig | ||
libcoreio | ||
libdwarf | ||
libdyld | ||
libunwind | ||
llvm_libunwind | ||
runtime | ||
szl | ||
Cargo.lock | ||
Cargo.toml | ||
Makefile | ||
armv7-none-eabihf.json |