Commit Graph

387 Commits

Author SHA1 Message Date
mwojcik 241113c6b2 'while' is reverse of 'until'... 2021-09-20 15:03:49 +02:00
mwojcik 414cfd2fa7 * few cleanups
* libcortexa9 mutex behavior understood
* io.until replaced with spinlock
2021-09-20 14:41:15 +02:00
mwojcik ff77204d37 moving drtio master code from mainline artiq: moninj and rtio_mgt 2021-09-17 14:20:37 +02:00
mwojcik 0b89cf8002 slight cleanup, started work on master mode 2021-09-16 15:38:51 +02:00
mwojcik 1160676fd6 zc706: changed io standard for si5324 on nist backplates 2021-09-15 11:19:43 +02:00
mwojcik 176e370872 kasli_soc satellite: fixed rust config
si5324: fixed double mut borrow in soft reset
2021-09-13 15:36:47 +02:00
mwojcik 9c09216281 updated gateware for not yet published migen-axi changes 2021-09-13 15:06:34 +02:00
mwojcik d3152f3d24 changed auxctrl tx/rx memory to axi2csr_sram 2021-09-10 15:25:05 +02:00
mwojcik 9c14694fc4 added rtioclockmultiplier where applicable
(nist variants don't compile for other reasons now)
2021-09-07 15:22:01 +02:00
mwojcik 1bddad6ff2 kasli_soc: fixes to make satellite variant work 2021-09-07 14:51:46 +02:00
mwojcik cd3e46fb3a fixes in makefile for kasli and satellite variants 2021-09-06 15:23:53 +02:00
mwojcik 76929d2aa1 zc706:
* broke down platforms (refactor),
* added nist master/sat variants
* master doesn't build yet, satellite only simple variant
2021-09-06 14:30:09 +02:00
mwojcik 20681a13c4 gateware: fixed cfg keys - case consistent w/ code 2021-09-06 10:57:42 +02:00
mwojcik 5e916f588e libboard_zynq: * pca9548 selection for si5234
* added proper support for targets
satman:
* removed unnecessary messages
* added libboard_zynq to targets in cargo.toml
2021-09-06 10:44:25 +02:00
mwojcik 9022064cf1 added siphaser to zc706 satellite, small fixes 2021-09-06 09:06:16 +02:00
mwojcik b678408105 rustc_cfg is case sensitive. Si5324 was not achnowledged. 2021-09-03 14:58:17 +02:00
mwojcik 0c259d9833 kasli_soc: satellite brought to the same level as zc706 2021-09-03 11:05:41 +02:00
mwojcik e38c4a14ca code cleanup:
* moved shared init_gateware to libboard_artiq
* suppressed warnings for zc706 satman
2021-09-02 14:39:34 +02:00
mwojcik d19a30a2d9 satman: init gateware, set log level 2021-09-02 12:50:42 +02:00
mwojcik 67f4ec5782 satman: satisfied libunwind's demands, compiles 2021-09-01 15:05:08 +02:00
mwojcik 1ad0e77cae satman: added unwind as it seems necessary 2021-09-01 11:42:41 +02:00
mwojcik 5cfcee6d20 satman: not a library - made closer to runtime 2021-09-01 11:05:46 +02:00
mwojcik 37e8b576b1 satellite:
* fixing repeaters that can't exist on zc706
* fixing various warnings
* fixed timer and i2c references
2021-08-31 15:25:56 +02:00
mwojcik 36bf30c446 satman: removed irrelevant (kasli v2) code 2021-08-31 13:47:43 +02:00
mwojcik e56f99b3ae satman: straightened up drtio interface 2021-08-31 12:46:52 +02:00
mwojcik f80f2ac99d added support for satellite variants in nix-build 2021-08-31 11:55:34 +02:00
mwojcik db9b744825 satman: fixed timeout millisecond/u64 mismatch 2021-08-30 15:06:46 +02:00
mwojcik be0baf5da8 satman: adjusted drtio::Error instances 2021-08-30 14:38:00 +02:00
mwojcik 59cf4bc689 libboard_zynq: fully modified to work with core_io 2021-08-27 15:16:13 +02:00
mwojcik 581f6c6b4e libboard_artiq: tried moving drtio to io::proto 2021-08-27 14:44:54 +02:00
mwojcik e0516eeda9 libio: removed custom read/write, moved to core_io 2021-08-27 13:12:19 +02:00
mwojcik 9b2b1dadaa satman: repeater fixes, missing code 2021-08-26 15:20:33 +02:00
mwojcik cb3f0a404c libio: read/write traits from libio not core_io 2021-08-26 14:59:04 +02:00
mwojcik 10cbea72a2 clean up in dependencies 2021-08-26 13:16:51 +02:00
mwojcik ff7ba56d26 forgot to remove a debug print 2021-08-26 12:54:19 +02:00
mwojcik 39d522e1a7 drtioaux_proto: removed failure, need to fix traits 2021-08-25 13:03:54 +02:00
mwojcik a8a2da575b libboard_artiq: added mem.rs, yet to fix drtioaux 2021-08-24 14:11:30 +02:00
mwojcik 37eb4669fb makefile: satman support, separated from runtime 2021-08-24 13:57:10 +02:00
mwojcik b585eaaa37 zc706: added memory iface generator 2021-08-24 13:51:38 +02:00
mwojcik 1358c8bfe9 zc706 gateware: base class for drtio is SoCCore 2021-08-24 12:01:04 +02:00
mwojcik b2d9003d9f drtioaucontroller: made two decoders 2021-08-20 15:13:56 +02:00
mwojcik e43684a3ed moved AXI SRAM to migen-axi 2021-08-18 12:36:17 +02:00
mwojcik 7b868e1c9d few fixes, typos and missed unnecessary statements 2021-08-17 13:16:02 +02:00
mwojcik 61f81cec47 sram: redesigned write FSM. removed unused signals 2021-08-17 11:10:08 +02:00
mwojcik 3e1d14ff38 replaced increment logic with ready Incr module 2021-08-16 15:33:50 +02:00
mwojcik 67ed7fae78 sram: or operator in wrong place for wrapped burst 2021-08-16 12:05:23 +02:00
mwojcik f015d6732b sram: support for different burst settings on read 2021-08-16 11:51:50 +02:00
mwojcik b6dd5bea68 sram: fixed wrong assumptions on some signals 2021-08-13 14:58:18 +02:00
mwojcik bfe0c34f57 sram: rewrote read fsm for sram 2021-08-13 14:14:43 +02:00
mwojcik 39509f01d6 aux_controller: sram ported to axi, first attempt 2021-08-13 13:06:10 +02:00