forked from M-Labs/artiq-zynq
satellite gateware: add rtio analyzer
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parent
259b0ba1b7
commit
c536a70890
@ -438,6 +438,10 @@ class GenericSatellite(SoCCore):
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self.submodules.rtio_moninj = rtio.MonInj(self.rtio_channels)
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self.submodules.rtio_moninj = rtio.MonInj(self.rtio_channels)
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self.csr_devices.append("rtio_moninj")
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self.csr_devices.append("rtio_moninj")
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self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.local_io.cri,
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self.ps7.s_axi_hp1)
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self.csr_devices.append("rtio_analyzer")
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rtio_clk_period = 1e9/clk_freq
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rtio_clk_period = 1e9/clk_freq
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self.rustc_cfg["rtio_frequency"] = str(clk_freq/1e6)
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self.rustc_cfg["rtio_frequency"] = str(clk_freq/1e6)
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@ -486,6 +486,10 @@ class _SatelliteBase(SoCCore):
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enable_routing=True)
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enable_routing=True)
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self.csr_devices.append("cri_con")
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self.csr_devices.append("cri_con")
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self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.rtio_core.cri,
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self.ps7.s_axi_hp1)
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self.csr_devices.append("rtio_analyzer")
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self.submodules.routing_table = rtio.RoutingTableAccess(self.cri_con)
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self.submodules.routing_table = rtio.RoutingTableAccess(self.cri_con)
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self.csr_devices.append("routing_table")
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self.csr_devices.append("routing_table")
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@ -28,6 +28,7 @@ use libboard_artiq::io_expander;
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#[cfg(has_si5324)]
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#[cfg(has_si5324)]
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use libboard_artiq::si5324;
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use libboard_artiq::si5324;
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use libboard_artiq::{drtio_routing, drtioaux, identifier_read, logger, pl::csr};
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use libboard_artiq::{drtio_routing, drtioaux, identifier_read, logger, pl::csr};
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use libboard_artiq::{drtioaux_proto::ANALYZER_MAX_SIZE};
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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use libboard_zynq::error_led::ErrorLED;
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use libboard_zynq::error_led::ErrorLED;
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use libboard_zynq::{gic, i2c::I2c, mpcore, print, println, stdio, time::Milliseconds, timer::GlobalTimer};
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use libboard_zynq::{gic, i2c::I2c, mpcore, print, println, stdio, time::Milliseconds, timer::GlobalTimer};
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@ -421,7 +422,7 @@ fn process_aux_packet(
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drtioaux::send(0, &drtioaux::Packet::AnalyzerHeader {
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drtioaux::send(0, &drtioaux::Packet::AnalyzerHeader {
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total_byte_count: header.total_byte_count,
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total_byte_count: header.total_byte_count,
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sent_bytes: header.sent_bytes,
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sent_bytes: header.sent_bytes,
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overflow_occurred: header.overflow,
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overflow_occurred: header.error,
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})
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})
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}
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}
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drtioaux::Packet::AnalyzerDataRequest { destination: _destination } => {
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drtioaux::Packet::AnalyzerDataRequest { destination: _destination } => {
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