From a8a2da575bc1123b2ced3f47161194f0fa5d6ebf Mon Sep 17 00:00:00 2001 From: mwojcik Date: Tue, 24 Aug 2021 14:11:30 +0200 Subject: [PATCH] libboard_artiq: added mem.rs, yet to fix drtioaux --- src/libboard_artiq/src/drtioaux.rs | 19 ++++++------------- src/libboard_artiq/src/lib.rs | 9 +++++++++ 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/src/libboard_artiq/src/drtioaux.rs b/src/libboard_artiq/src/drtioaux.rs index e2bf32f5..85706217 100644 --- a/src/libboard_artiq/src/drtioaux.rs +++ b/src/libboard_artiq/src/drtioaux.rs @@ -1,35 +1,28 @@ use core::slice; use crc; + use io::{ProtoRead, ProtoWrite, Cursor, Error as IoError}; -//use board_misoc::{mem::DRTIOAUX_MEM}; // <- port -//^ uses generated files (like csr, but mem) - todo check after initial generation +use mem::mem::DRTIOAUX_MEM; use pl::csr::DRTIOAUX; -use drtioaux_proto::Error as ProtocolError; +use crate::drtioaux_proto::Error as ProtocolError; use libboard_zynq::{timer::GlobalTimer, time::Milliseconds}; -pub use drtioaux_proto::Packet; +pub use crate::drtioaux_proto::Packet; // this is parametric over T because there's no impl Fail for !. -#[derive(Fail, Debug)] +#[derive(Debug)] pub enum Error { - #[fail(display = "gateware reported error")] GatewareError, - #[fail(display = "packet CRC failed")] CorruptedPacket, - #[fail(display = "link is down")] LinkDown, - #[fail(display = "timed out waiting for data")] TimedOut, - #[fail(display = "unexpected reply")] UnexpectedReply, - #[fail(display = "routing error")] RoutingError, - #[fail(display = "protocol error: {}", _0)] - Protocol(#[cause] ProtocolError) + Protocol(ProtocolError) } impl From> for Error { diff --git a/src/libboard_artiq/src/lib.rs b/src/libboard_artiq/src/lib.rs index dce8082d..764af64a 100644 --- a/src/libboard_artiq/src/lib.rs +++ b/src/libboard_artiq/src/lib.rs @@ -2,10 +2,14 @@ #![feature(never_type)] extern crate log; +extern crate crc; +extern crate failure; +extern crate failure_derive; extern crate libboard_zynq; extern crate libconfig; extern crate libcortex_a9; extern crate log_buffer; +extern crate io; // has csr; taken from runtime main #[path = "../../../build/pl.rs"] @@ -13,6 +17,11 @@ pub mod pl; #[cfg(has_drtio)] pub mod drtioaux; +// for now, memory map is only needed for DRTIO firmware +#[cfg(has_drtio)] +#[path = "../../../build/mem.rs"] +pub mod mem; + pub mod drtio_routing; pub mod logger;