diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py index 3432b187..a60d72d4 100755 --- a/src/gateware/zc706.py +++ b/src/gateware/zc706.py @@ -456,6 +456,7 @@ class Satellite(SoCCore): self.submodules.si5324_rst_n = gpio.GPIOOut(platform.request("si5324").rst_n) self.csr_devices.append("si5324_rst_n") self.rustc_cfg["has_si5324"] = None + self.rustc_cfg["has_siphaser"] = None rtio_clk_period = 1e9/self.drtio_transceiver.rtio_clk_freq # Constrain TX & RX timing for the first transceiver channel diff --git a/src/libboard_artiq/src/lib.rs b/src/libboard_artiq/src/lib.rs index 0aca5b59..580ade71 100644 --- a/src/libboard_artiq/src/lib.rs +++ b/src/libboard_artiq/src/lib.rs @@ -33,9 +33,6 @@ pub mod logger; #[cfg(has_si5324)] pub mod si5324; -#[cfg(has_siphaser)] -pub mod siphaser; - use core::{cmp, str}; use libboard_zynq::slcr; use libregister::RegisterW; diff --git a/src/libboard_artiq/src/si5324.rs b/src/libboard_artiq/src/si5324.rs index f7fc683a..de11427a 100644 --- a/src/libboard_artiq/src/si5324.rs +++ b/src/libboard_artiq/src/si5324.rs @@ -279,16 +279,18 @@ pub mod siphaser { use pl::csr; pub fn select_recovered_clock(i2c: &mut I2c, rc: bool, timer: &mut GlobalTimer) -> Result<()> { - write(i2c, 3, (read(3)? & 0xdf) | (1 << 5))?; // DHOLD=1 + let val = read(i2c, 3)?; + write(i2c, 3, (val & 0xdf) | (1 << 5))?; // DHOLD=1 unsafe { csr::siphaser::switch_clocks_write(if rc { 1 } else { 0 }); } - write(i2c, 3, (read(3)? & 0xdf) | (0 << 5))?; // DHOLD=0 - monitor_lock(timer)?; + let val = read(i2c, 3)?; + write(i2c, 3, (val & 0xdf) | (0 << 5))?; // DHOLD=0 + monitor_lock(i2c, timer)?; Ok(()) } - fn phase_shift(direction: u8, timer: GlobalTimer) { + fn phase_shift(direction: u8, timer: &mut GlobalTimer) { unsafe { csr::siphaser::phase_shift_write(direction); while csr::siphaser::phase_shift_done_read() == 0 {} @@ -297,7 +299,7 @@ pub mod siphaser { timer.delay_us(500); } - fn has_error(timer: GlobalTimer) -> bool { + fn has_error(timer: &mut GlobalTimer) -> bool { unsafe { csr::siphaser::error_write(1); } diff --git a/src/satman/src/main.rs b/src/satman/src/main.rs index 3a4f1884..0eeadf84 100644 --- a/src/satman/src/main.rs +++ b/src/satman/src/main.rs @@ -485,6 +485,11 @@ pub extern fn main_core0() -> i32 { let mut hardware_tick_ts = 0; + print!("all set"); + + unsafe { + info!("rx_disable_read: {}, rx_up_read: {}", csr::drtiosat::rx_disable_read(), csr::drtiosat::rx_up_read()); + } loop { while !drtiosat_link_rx_up() { drtiosat_process_errors(); @@ -493,13 +498,17 @@ pub extern fn main_core0() -> i32 { rep.service(&routing_table, rank, &mut timer); } hardware_tick(&mut hardware_tick_ts, &mut timer); + unsafe { + info!("rx_disable_read: {}, rx_up_read: {}", csr::drtiosat::rx_disable_read(), csr::drtiosat::rx_up_read()); + } + timer.delay_us(1000_000); } info!("uplink is up, switching to recovered clock"); #[cfg(has_siphaser)] { - si5324::siphaser::select_recovered_clock(true).expect("failed to switch clocks"); - si5324::siphaser::calibrate_skew().expect("failed to calibrate skew"); + si5324::siphaser::select_recovered_clock(&mut i2c, true, &mut timer).expect("failed to switch clocks"); + si5324::siphaser::calibrate_skew(&mut timer).expect("failed to calibrate skew"); } drtioaux::reset(0); @@ -532,7 +541,7 @@ pub extern fn main_core0() -> i32 { drtiosat_tsc_loaded(); info!("uplink is down, switching to local oscillator clock"); #[cfg(has_siphaser)] - si5324::siphaser::select_recovered_clock(false).expect("failed to switch clocks"); + si5324::siphaser::select_recovered_clock(&mut i2c, false, &mut timer).expect("failed to switch clocks"); } }