forked from M-Labs/artiq-zynq
* few cleanups
* libcortexa9 mutex behavior understood * io.until replaced with spinlock
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ff77204d37
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414cfd2fa7
@ -12,27 +12,19 @@ extern crate libconfig;
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extern crate libcortex_a9;
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extern crate libcortex_a9;
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extern crate log_buffer;
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extern crate log_buffer;
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// has csr; taken from runtime main
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#[path = "../../../build/pl.rs"]
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#[path = "../../../build/pl.rs"]
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pub mod pl;
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pub mod pl;
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pub mod drtioaux_proto;
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pub mod drtioaux_proto;
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pub mod drtio_routing;
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pub mod logger;
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#[cfg(has_si5324)]
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pub mod si5324;
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#[cfg(has_drtio)]
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#[cfg(has_drtio)]
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pub mod drtioaux;
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pub mod drtioaux;
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// for now, memory map is only needed for DRTIO firmware
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#[cfg(has_drtio)]
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#[cfg(has_drtio)]
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#[path = "../../../build/mem.rs"]
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#[path = "../../../build/mem.rs"]
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pub mod mem;
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pub mod mem;
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pub mod drtio_routing;
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pub mod logger;
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#[cfg(has_si5324)]
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pub mod si5324;
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use core::{cmp, str};
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use core::{cmp, str};
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use libboard_zynq::slcr;
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use libboard_zynq::slcr;
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use libregister::RegisterW;
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use libregister::RegisterW;
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@ -21,15 +21,13 @@ use void::Void;
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use embedded_hal::blocking::delay::DelayMs;
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use embedded_hal::blocking::delay::DelayMs;
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use libconfig::Config;
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use libconfig::Config;
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use libcortex_a9::l2c::enable_l2_cache;
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use libcortex_a9::l2c::enable_l2_cache;
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use libboard_artiq::{logger, identifier_read, init_gateware};
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use libboard_artiq::{logger, identifier_read, init_gateware, pl};
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#[cfg(has_si5324)]
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#[cfg(has_si5324)]
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use libboard_artiq::si5324;
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use libboard_artiq::si5324;
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mod proto_async;
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mod proto_async;
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mod comms;
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mod comms;
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mod rpc;
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mod rpc;
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#[path = "../../../build/pl.rs"]
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mod pl;
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#[cfg(ki_impl = "csr")]
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#[cfg(ki_impl = "csr")]
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#[path = "rtio_csr.rs"]
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#[path = "rtio_csr.rs"]
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mod rtio;
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mod rtio;
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@ -61,10 +61,10 @@ enum DeviceMessage {
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mod remote_moninj {
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mod remote_moninj {
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use drtioaux;
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use drtioaux;
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use rtio_mgt::drtio;
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use rtio_mgt::drtio;
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use sched::{Io, Mutex};
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use libcortexa9::Mutex;
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pub fn read_probe(io: &Io, aux_mutex: &Mutex, linkno: u8, destination: u8, channel: u16, probe: u8) -> u32 {
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pub fn read_probe( aux_mutex: &Mutex, linkno: u8, destination: u8, channel: u16, probe: u8) -> u32 {
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let reply = drtio::aux_transact(io, aux_mutex, linkno, &drtioaux::Packet::MonitorRequest {
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let reply = drtio::aux_transact(aux_mutex, linkno, &drtioaux::Packet::MonitorRequest {
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destination: destination,
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destination: destination,
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channel: channel,
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channel: channel,
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probe: probe
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probe: probe
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@ -77,8 +77,8 @@ mod remote_moninj {
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0
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0
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}
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}
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pub fn inject(io: &Io, aux_mutex: &Mutex, linkno: u8, destination: u8, channel: u16, overrd: u8, value: u8) {
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pub fn inject(aux_mutex: &Mutex, linkno: u8, destination: u8, channel: u16, overrd: u8, value: u8) {
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let _lock = aux_mutex.lock(io).unwrap();
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let _lock = aux_mutex.lock();
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drtioaux::send(linkno, &drtioaux::Packet::InjectionRequest {
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drtioaux::send(linkno, &drtioaux::Packet::InjectionRequest {
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destination: destination,
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destination: destination,
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channel: channel,
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channel: channel,
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@ -87,8 +87,8 @@ mod remote_moninj {
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}).unwrap();
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}).unwrap();
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}
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}
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pub fn read_injection_status(io: &Io, aux_mutex: &Mutex, linkno: u8, destination: u8, channel: u16, overrd: u8) -> u8 {
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pub fn read_injection_status(aux_mutex: &Mutex, linkno: u8, destination: u8, channel: u16, overrd: u8) -> u8 {
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let reply = drtio::aux_transact(io, aux_mutex, linkno, &drtioaux::Packet::InjectionStatusRequest {
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let reply = drtio::aux_transact(aux_mutex, linkno, &drtioaux::Packet::InjectionStatusRequest {
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destination: destination,
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destination: destination,
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channel: channel,
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channel: channel,
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overrd: overrd
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overrd: overrd
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@ -50,7 +50,7 @@ pub mod drtio {
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pub fn aux_transact(aux_mutex: &Mutex, linkno: u8, request: &drtioaux::Packet,
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pub fn aux_transact(aux_mutex: &Mutex, linkno: u8, request: &drtioaux::Packet,
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timer: GlobalTimer) -> Result<drtioaux::Packet, &'static str> {
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timer: GlobalTimer) -> Result<drtioaux::Packet, &'static str> {
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let _lock = aux_mutex.lock().unwrap();
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let _lock = aux_mutex.lock();
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drtioaux::send(linkno, request).unwrap();
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drtioaux::send(linkno, request).unwrap();
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recv_aux_timeout(io, linkno, 200, timer)
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recv_aux_timeout(io, linkno, 200, timer)
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}
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}
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@ -83,7 +83,7 @@ pub mod drtio {
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}
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}
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fn sync_tsc(aux_mutex: &Mutex, linkno: u8, timer: GlobalTimer) -> Result<(), &'static str> {
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fn sync_tsc(aux_mutex: &Mutex, linkno: u8, timer: GlobalTimer) -> Result<(), &'static str> {
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let _lock = aux_mutex.lock().unwrap();
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let _lock = aux_mutex.lock();
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unsafe {
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unsafe {
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(csr::DRTIO[linkno as usize].set_time_write)(1);
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(csr::DRTIO[linkno as usize].set_time_write)(1);
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@ -137,7 +137,7 @@ pub mod drtio {
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}
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}
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fn process_unsolicited_aux(aux_mutex: &Mutex, linkno: u8) {
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fn process_unsolicited_aux(aux_mutex: &Mutex, linkno: u8) {
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let _lock = aux_mutex.lock().unwrap();
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let _lock = aux_mutex.lock();
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match drtioaux::recv(linkno) {
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match drtioaux::recv(linkno) {
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Ok(Some(packet)) => warn!("[LINK#{}] unsolicited aux packet: {:?}", linkno, packet),
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Ok(Some(packet)) => warn!("[LINK#{}] unsolicited aux packet: {:?}", linkno, packet),
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Ok(None) => (),
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Ok(None) => (),
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@ -320,15 +320,16 @@ pub mod drtio {
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use super::*;
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use super::*;
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pub fn startup(_aux_mutex: &Mutex, _routing_table: &Urc<RefCell<drtio_routing::RoutingTable>>,
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pub fn startup(_aux_mutex: &Mutex, _routing_table: &Urc<RefCell<drtio_routing::RoutingTable>>,
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_up_destinations: &Urc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, timer:GlobalTimer) {}
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_up_destinations: &Urc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, _timer:GlobalTimer) {}
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pub fn reset(_aux_mutex: &Mutex, timer: GlobalTimer) {}
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pub fn reset(_aux_mutex: &Mutex, _timer: GlobalTimer) {}
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}
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}
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// todo figure out what to do with these untils
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fn async_error_thread() {
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fn async_error_thread(io: Io) {
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loop {
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loop {
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unsafe {
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unsafe {
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io.until(|| csr::rtio_core::async_error_read() != 0).unwrap();
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// replaced io.until with spinlock
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while csr::rtio_core::async_error_read() != 0 {}
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let errors = csr::rtio_core::async_error_read();
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let errors = csr::rtio_core::async_error_read();
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if errors & 1 != 0 {
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if errors & 1 != 0 {
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error!("RTIO collision involving channel {}",
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error!("RTIO collision involving channel {}",
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