From 407e18a6a0b459350dddb691eb8c4cf09a1124ac Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Fri, 10 Jul 2020 16:36:45 +0800
Subject: [PATCH] fix typos

---
 src/runtime/src/kernel/core1.rs | 2 +-
 src/szl/src/main.rs             | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/runtime/src/kernel/core1.rs b/src/runtime/src/kernel/core1.rs
index 4964e0c5..e0a97d02 100644
--- a/src/runtime/src/kernel/core1.rs
+++ b/src/runtime/src/kernel/core1.rs
@@ -90,7 +90,7 @@ impl KernelImage {
 
     pub unsafe fn exec(&mut self) {
         // Flush data cache entries for the image in DDR, including
-        // Memory/Instruction Symchronization Barriers
+        // Memory/Instruction Synchronization Barriers
         dcci_slice(self.library.image.data);
 
         (mem::transmute::<u32, fn()>(self.__modinit__))();
diff --git a/src/szl/src/main.rs b/src/szl/src/main.rs
index c2823cd0..717bac89 100644
--- a/src/szl/src/main.rs
+++ b/src/szl/src/main.rs
@@ -53,7 +53,7 @@ pub fn main_core0() {
         error!("decompression failed");
     } else {
         // Flush data cache entries for all of DDR, including
-        // Memory/Instruction Symchronization Barriers
+        // Memory/Instruction Synchronization Barriers
         dcci_slice(unsafe {
             core::slice::from_raw_parts(ddr.ptr::<u8>(), ddr.size())
         });