forked from M-Labs/artiq-zynq
slight cleanup, started work on master mode
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1160676fd6
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0b89cf8002
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@ -172,6 +172,14 @@ pub fn main_core0() {
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}
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}
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};
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};
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#[cfg(has_drtio)]
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let drtio_routing_table = drtio_routing::config_routing_table(csr::DRTIO.len(), cfg);
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#[cfg(not(has_drtio))]
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let drtio_routing_table = drtio_routing::RoutingTable::default_empty();
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let up_destinations = [false; drtio_routing::DEST_COUNT];
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#[cfg(has_drtio_routing)]
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drtio_routing::interconnect_disable_all();
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init_rtio(&mut timer, &cfg);
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init_rtio(&mut timer, &cfg);
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task::spawn(report_async_rtio_errors());
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task::spawn(report_async_rtio_errors());
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@ -406,21 +406,7 @@ fn hardware_tick(ts: &mut u64, timer: &mut GlobalTimer) {
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}
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}
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}
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}
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#[cfg(all(has_si5324, rtio_frequency = "150.0"))]
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#[cfg(has_si5324)]
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const SI5324_SETTINGS: si5324::FrequencySettings
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= si5324::FrequencySettings {
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n1_hs : 6,
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nc1_ls : 6,
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n2_hs : 10,
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n2_ls : 270,
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n31 : 75,
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n32 : 75,
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bwsel : 4,
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crystal_ref: true
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};
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// rtio frequencies other than 125 MHz won't be supported?
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#[cfg(all(has_si5324, rtio_frequency = "125.0"))]
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const SI5324_SETTINGS: si5324::FrequencySettings
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const SI5324_SETTINGS: si5324::FrequencySettings
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= si5324::FrequencySettings {
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= si5324::FrequencySettings {
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n1_hs : 5,
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n1_hs : 5,
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