forked from M-Labs/zynq-rs
fixup
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3d41bb5c8a
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@ -6,6 +6,7 @@ extern crate alloc;
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use alloc::collections::BTreeMap;
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use core::arch::asm;
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use core::ptr::addr_of_mut;
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use libasync::{
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delay,
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smoltcp::{Sockets, TcpStream},
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@ -70,7 +71,7 @@ interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
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if id.0 == 0 {
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gic.end_interrupt(id);
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asm::exit_irq();
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SP.write(&mut __stack1_start as *mut _ as u32);
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SP.write(addr_of_mut!(__stack1_start) as *mut _ as u32);
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asm::enable_irq();
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CORE1_RESTART.store(false, Ordering::Relaxed);
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notify_spin_lock();
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