srenblad
/
zynq-rs
forked from M-Labs/zynq-rs
1
0
Fork 0
Code Pull Requests Activity

uart: remove type conversion from baud_rate_gen

This commit is contained in:
Astro 2019-05-30 00:22:45 +02:00
parent a645d13f4b
commit b961526b97
1 changed files with 2 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/uart/baud_rate_gen.rs
View File

@ -1,8 +1,8 @@
use crate::regs::*;
use super::regs::{RegisterBlock, BaudRateGen, BaudRateDiv};
const BDIV_MIN: u8 = 4;
const BDIV_MAX: u8 = 255;
const BDIV_MIN: u32 = 4;
const BDIV_MAX: u32 = 255;
const CD_MAX: u16 = 65535;
fn div_round_closest(q: u32, d: u32) -> u32 {
@ -17,7 +17,6 @@ pub fn configure(regs: &mut RegisterBlock, mut clk: u32, baud: u32) {
let mut best = None;
for bdiv in BDIV_MIN..=BDIV_MAX {
let bdiv: u32 = bdiv.into();
let cd = div_round_closest(clk, baud * (bdiv + 1));
if cd < 1 || cd > CD_MAX.into() {
continue;