diff --git a/libconfig/src/lib.rs b/libconfig/src/lib.rs
index 1d5bbbb..e1ca5f5 100644
--- a/libconfig/src/lib.rs
+++ b/libconfig/src/lib.rs
@@ -189,10 +189,10 @@ impl Config {
             if is_str {
                 let mut f = root_dir.create_file("/CONFIG.TXT")?;
                 f.seek(SeekFrom::End(0))?;
-                f.write(key.as_bytes());
-                f.write("=".as_bytes());
-                f.write(value.as_slice());
-                f.write(NEWLINE);
+                f.write(key.as_bytes())?;
+                f.write("=".as_bytes())?;
+                f.write(value.as_slice())?;
+                f.write(NEWLINE)?;
             } else {
                 let dir = root_dir.create_dir("/CONFIG")?;
                 let mut f = dir.create_file(&[key, ".BIN"].concat())?;
diff --git a/libcortex_a9/src/mmu.rs b/libcortex_a9/src/mmu.rs
index 4c72e48..85c0a35 100644
--- a/libcortex_a9/src/mmu.rs
+++ b/libcortex_a9/src/mmu.rs
@@ -1,4 +1,5 @@
 use bit_field::BitField;
+use core::ptr::addr_of_mut;
 use super::{regs::*, asm::*, cache::*};
 use libregister::RegisterW;
 
@@ -136,7 +137,7 @@ pub struct L1Table {
 impl L1Table {
     pub fn get() -> &'static mut Self {
         unsafe {
-            &mut L1_TABLE
+            &mut *addr_of_mut!(L1_TABLE)
         }
     }
 
diff --git a/libcortex_a9/src/sync_channel.rs b/libcortex_a9/src/sync_channel.rs
index a672f6e..b15a804 100644
--- a/libcortex_a9/src/sync_channel.rs
+++ b/libcortex_a9/src/sync_channel.rs
@@ -37,7 +37,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
             notify_spin_lock();
             if !prev.is_null() {
                 unsafe {
-                    Box::from_raw(prev);
+                    drop(Box::from_raw(prev));
                 }
             }
             Ok(())
@@ -91,7 +91,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
         for v in self.list.iter() {
             let original = v.swap(core::ptr::null_mut(), Ordering::Relaxed);
             if !original.is_null() {
-                Box::from_raw(original);
+                drop(Box::from_raw(original));
             }
         }
     }
diff --git a/libsupport_zynq/src/boot.rs b/libsupport_zynq/src/boot.rs
index 3b52934..ca41954 100644
--- a/libsupport_zynq/src/boot.rs
+++ b/libsupport_zynq/src/boot.rs
@@ -1,5 +1,5 @@
 use r0::zero_bss;
-use core::ptr::write_volatile;
+use core::ptr::{write_volatile, addr_of_mut, addr_of};
 use core::arch::asm;
 use libregister::{
     VolatileCell,
@@ -43,7 +43,7 @@ unsafe extern "C" fn boot_core0() -> ! {
     let mpcore = mpcore::RegisterBlock::mpcore();
     mpcore.scu_invalidate.invalidate_all_cores();
 
-    zero_bss(&mut __bss_start, &mut __bss_end);
+    zero_bss(addr_of_mut!(__bss_start), addr_of_mut!(__bss_end));
 
     let mmu_table = mmu::L1Table::get()
         .setup_flat_layout();
@@ -132,7 +132,9 @@ impl Core1 {
             CORE1_ENABLED.set(true);
         }
         // Flush cache-line
-        cache::dcc(unsafe { &CORE1_ENABLED });
+        unsafe {
+            cache::dcc(&*addr_of!(CORE1_ENABLED) );
+        }
         if sdram {
             cache::dccmvac(0);
             asm::dsb();
@@ -153,7 +155,7 @@ impl Core1 {
     pub fn disable(&self) {
         unsafe {
             CORE1_ENABLED.set(false);
-            cache::dccmvac(&CORE1_ENABLED  as *const _ as usize);
+            cache::dccmvac(addr_of!(CORE1_ENABLED) as *const _ as usize);
             asm::dsb();
         }
         self.restart();
diff --git a/szl/src/main.rs b/szl/src/main.rs
index 3ffbb95..669a29c 100644
--- a/szl/src/main.rs
+++ b/szl/src/main.rs
@@ -8,6 +8,7 @@ mod netboot;
 
 use alloc::rc::Rc;
 use core::mem;
+use core::ptr::{addr_of_mut, addr_of};
 use libboard_zynq::{
     self as zynq,
     clocks::source::{ArmPll, ClockSource, IoPll},
@@ -115,18 +116,18 @@ pub fn main_core0() {
 
     unsafe {
         let max_len =
-            &__runtime_end as *const usize as usize - &__runtime_start as *const usize as usize;
+            addr_of!(__runtime_end) as *const usize as usize - addr_of!(__runtime_start) as *const usize as usize;
         match slcr::RegisterBlock::unlocked(|slcr| slcr.boot_mode.read().boot_mode_pins()) {
             slcr::BootModePins::Jtag => netboot::netboot(
                 &mut bootgen_file,
                 config,
-                &mut __runtime_start as *mut usize as *mut u8,
+                addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
                 max_len,
             ),
             slcr::BootModePins::SdCard => {
                 if boot_sd(
                     &mut bootgen_file,
-                    &mut __runtime_start as *mut usize as *mut u8,
+                    addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
                     max_len,
                 )
                 .is_err()
@@ -136,7 +137,7 @@ pub fn main_core0() {
                     netboot::netboot(
                         &mut bootgen_file,
                         config,
-                        &mut __runtime_start as *mut usize as *mut u8,
+                        addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
                         max_len,
                     )
                 }
@@ -147,7 +148,7 @@ pub fn main_core0() {
                 netboot::netboot(
                     &mut bootgen_file,
                     config,
-                    &mut __runtime_start as *mut usize as *mut u8,
+                    addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
                     max_len,
                 )
             }