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zynq-rs
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fixed warnings

This commit is contained in:
Simon Renblad 2024-10-07 15:26:16 +08:00
parent 85596cea79
commit 48b6d0bcdc
5 changed files with 20 additions and 16 deletions
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8
libconfig/src/lib.rs
View File

@ -189,10 +189,10 @@ impl Config {
if is_str {
let mut f = root_dir.create_file("/CONFIG.TXT")?;
f.seek(SeekFrom::End(0))?;
f.write(key.as_bytes());
f.write("=".as_bytes());
f.write(value.as_slice());
f.write(NEWLINE);
f.write(key.as_bytes())?;
f.write("=".as_bytes())?;
f.write(value.as_slice())?;
f.write(NEWLINE)?;
} else {
let dir = root_dir.create_dir("/CONFIG")?;
let mut f = dir.create_file(&[key, ".BIN"].concat())?;

3
libcortex_a9/src/mmu.rs
View File

@ -1,4 +1,5 @@
use bit_field::BitField;
use core::ptr::addr_of_mut;
use super::{regs::*, asm::*, cache::*};
use libregister::RegisterW;
@ -136,7 +137,7 @@ pub struct L1Table {
impl L1Table {
pub fn get() -> &'static mut Self {
unsafe {
&mut L1_TABLE
&mut *addr_of_mut!(L1_TABLE)
}
}

4
libcortex_a9/src/sync_channel.rs
View File

@ -37,7 +37,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
notify_spin_lock();
if !prev.is_null() {
unsafe {
Box::from_raw(prev);
drop(Box::from_raw(prev));
}
}
Ok(())
@ -91,7 +91,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
for v in self.list.iter() {
let original = v.swap(core::ptr::null_mut(), Ordering::Relaxed);
if !original.is_null() {
Box::from_raw(original);
drop(Box::from_raw(original));
}
}
}

10
libsupport_zynq/src/boot.rs
View File

@ -1,5 +1,5 @@
use r0::zero_bss;
use core::ptr::write_volatile;
use core::ptr::{write_volatile, addr_of_mut, addr_of};
use core::arch::asm;
use libregister::{
VolatileCell,
@ -43,7 +43,7 @@ unsafe extern "C" fn boot_core0() -> ! {
let mpcore = mpcore::RegisterBlock::mpcore();
mpcore.scu_invalidate.invalidate_all_cores();
zero_bss(&mut __bss_start, &mut __bss_end);
zero_bss(addr_of_mut!(__bss_start), addr_of_mut!(__bss_end));
let mmu_table = mmu::L1Table::get()
.setup_flat_layout();
@ -132,7 +132,9 @@ impl Core1 {
CORE1_ENABLED.set(true);
}
// Flush cache-line
cache::dcc(unsafe { &CORE1_ENABLED });
unsafe {
cache::dcc(&*addr_of!(CORE1_ENABLED) );
}
if sdram {
cache::dccmvac(0);
asm::dsb();
@ -153,7 +155,7 @@ impl Core1 {
pub fn disable(&self) {
unsafe {
CORE1_ENABLED.set(false);
cache::dccmvac(&CORE1_ENABLED as *const _ as usize);
cache::dccmvac(addr_of!(CORE1_ENABLED) as *const _ as usize);
asm::dsb();
}
self.restart();

11
szl/src/main.rs
View File

@ -8,6 +8,7 @@ mod netboot;
use alloc::rc::Rc;
use core::mem;
use core::ptr::{addr_of_mut, addr_of};
use libboard_zynq::{
self as zynq,
clocks::source::{ArmPll, ClockSource, IoPll},
@ -115,18 +116,18 @@ pub fn main_core0() {
unsafe {
let max_len =
&__runtime_end as *const usize as usize - &__runtime_start as *const usize as usize;
addr_of!(__runtime_end) as *const usize as usize - addr_of!(__runtime_start) as *const usize as usize;
match slcr::RegisterBlock::unlocked(|slcr| slcr.boot_mode.read().boot_mode_pins()) {
slcr::BootModePins::Jtag => netboot::netboot(
&mut bootgen_file,
config,
&mut __runtime_start as *mut usize as *mut u8,
addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
max_len,
),
slcr::BootModePins::SdCard => {
if boot_sd(
&mut bootgen_file,
&mut __runtime_start as *mut usize as *mut u8,
addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
max_len,
)
.is_err()
@ -136,7 +137,7 @@ pub fn main_core0() {
netboot::netboot(
&mut bootgen_file,
config,
&mut __runtime_start as *mut usize as *mut u8,
addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
max_len,
)
}
@ -147,7 +148,7 @@ pub fn main_core0() {
netboot::netboot(
&mut bootgen_file,
config,
&mut __runtime_start as *mut usize as *mut u8,
addr_of_mut!(__runtime_start) as *mut usize as *mut u8,
max_len,
)
}