From 01fdb5dd95c30bf383739afb54f5dfd6318d0a0b Mon Sep 17 00:00:00 2001 From: Simon Renblad Date: Thu, 17 Oct 2024 16:26:02 +0800 Subject: [PATCH] switch to addr_of/addr_of_mut --- experiments/src/main.rs | 4 ++-- libcortex_a9/src/mmu.rs | 3 ++- libsupport_zynq/src/boot.rs | 6 +++--- szl/src/main.rs | 12 ++++++------ 4 files changed, 13 insertions(+), 12 deletions(-) diff --git a/experiments/src/main.rs b/experiments/src/main.rs index c832e80..203aa95 100644 --- a/experiments/src/main.rs +++ b/experiments/src/main.rs @@ -5,7 +5,7 @@ extern crate alloc; use alloc::collections::BTreeMap; -use core::arch::asm; +use core::{arch::asm, ptr::addr_of_mut}; use libasync::{ delay, smoltcp::{Sockets, TcpStream}, @@ -70,7 +70,7 @@ interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, { if id.0 == 0 { gic.end_interrupt(id); asm::exit_irq(); - SP.write(&mut __stack1_start as *mut _ as u32); + SP.write(addr_of_mut!(__stack1_start) as u32); asm::enable_irq(); CORE1_RESTART.store(false, Ordering::Relaxed); notify_spin_lock(); diff --git a/libcortex_a9/src/mmu.rs b/libcortex_a9/src/mmu.rs index 4c72e48..20664bd 100644 --- a/libcortex_a9/src/mmu.rs +++ b/libcortex_a9/src/mmu.rs @@ -1,6 +1,7 @@ use bit_field::BitField; use super::{regs::*, asm::*, cache::*}; use libregister::RegisterW; +use core::ptr::addr_of; #[derive(Copy, Clone)] #[repr(u8)] @@ -391,7 +392,7 @@ pub fn with_mmu !>(l1table: &L1Table, mut f: F) -> ! { let domains = AccessDomains::all_manager(); DACR.write(domains.into()); - let table_base = &l1table.table as *const _ as u32; + let table_base = addr_of!(l1table.table) as u32; assert!(table_base & 0x3fff == 0); TTBR0.write( TTBR0::zeroed() diff --git a/libsupport_zynq/src/boot.rs b/libsupport_zynq/src/boot.rs index 3b52934..1954206 100644 --- a/libsupport_zynq/src/boot.rs +++ b/libsupport_zynq/src/boot.rs @@ -1,5 +1,5 @@ use r0::zero_bss; -use core::ptr::write_volatile; +use core::ptr::{addr_of, addr_of_mut, write_volatile}; use core::arch::asm; use libregister::{ VolatileCell, @@ -43,7 +43,7 @@ unsafe extern "C" fn boot_core0() -> ! { let mpcore = mpcore::RegisterBlock::mpcore(); mpcore.scu_invalidate.invalidate_all_cores(); - zero_bss(&mut __bss_start, &mut __bss_end); + zero_bss(addr_of_mut!(__bss_start), addr_of_mut!(__bss_end)); let mmu_table = mmu::L1Table::get() .setup_flat_layout(); @@ -153,7 +153,7 @@ impl Core1 { pub fn disable(&self) { unsafe { CORE1_ENABLED.set(false); - cache::dccmvac(&CORE1_ENABLED as *const _ as usize); + cache::dccmvac(addr_of!(CORE1_ENABLED) as usize); asm::dsb(); } self.restart(); diff --git a/szl/src/main.rs b/szl/src/main.rs index 3ffbb95..0c98f3f 100644 --- a/szl/src/main.rs +++ b/szl/src/main.rs @@ -7,7 +7,7 @@ extern crate log; mod netboot; use alloc::rc::Rc; -use core::mem; +use core::{mem, ptr::{addr_of, addr_of_mut}}; use libboard_zynq::{ self as zynq, clocks::source::{ArmPll, ClockSource, IoPll}, @@ -115,18 +115,18 @@ pub fn main_core0() { unsafe { let max_len = - &__runtime_end as *const usize as usize - &__runtime_start as *const usize as usize; + addr_of!(__runtime_end) as usize - addr_of!(__runtime_start) as usize; match slcr::RegisterBlock::unlocked(|slcr| slcr.boot_mode.read().boot_mode_pins()) { slcr::BootModePins::Jtag => netboot::netboot( &mut bootgen_file, config, - &mut __runtime_start as *mut usize as *mut u8, + addr_of_mut!(__runtime_start) as *mut u8, max_len, ), slcr::BootModePins::SdCard => { if boot_sd( &mut bootgen_file, - &mut __runtime_start as *mut usize as *mut u8, + addr_of_mut!(__runtime_start) as *mut u8, max_len, ) .is_err() @@ -136,7 +136,7 @@ pub fn main_core0() { netboot::netboot( &mut bootgen_file, config, - &mut __runtime_start as *mut usize as *mut u8, + addr_of_mut!(__runtime_start) as *mut u8, max_len, ) } @@ -147,7 +147,7 @@ pub fn main_core0() { netboot::netboot( &mut bootgen_file, config, - &mut __runtime_start as *mut usize as *mut u8, + addr_of_mut!(__runtime_start) as *mut u8, max_len, ) }