Update links

Signed-off-by: Egor Savkin <es@m-labs.hk>

src/SUMMARY.md

@@ -31,4 +31,5 @@
   - [Clocking](sw_sup/clocking.md)
   - [device_db.py](sw_sup/device_db.md)
   - [Setup your PC for building ARTIQ firmware](sw_sup/setup_build_pc.md)
-  - [AFWS client](sw_sup/afws_client.md)
+  - [AFWS client](sw_sup/afws_client.md)
+  - [Integration with PyCharm](sw_sup/pycharm.md)

src/build_test_firmware.md

@@ -48,6 +48,7 @@ python -m artiq.gateware.targets.kasli <variant>.json
 artiq_flash --srcbuild -d artiq_kasli/<variant>/
 artiq_rtiomap dev_map.bin
 artiq_coremgmt config write -f device_map dev_map.bin
+artiq_coremgmt reboot
 ```
 
 ## Kasli-SoC (zynq)
@@ -73,10 +74,9 @@ nix build -L --impure --expr 'let fl = builtins.getFlake "git+https://git.m-labs
 # copy `results/boot.bin` to the SD card
 # insert SD card to the Kasli-SoC and boot
 artiq_coremgmt -D 192.168.1.56 config write -s ip 192.168.1.75 # or just place extra/CONFIG.TXT near the boot.bin on SD card
-# update firmware (alternative to copy to SD, if ARTIQ already running)
+# update firmware (alternative to copy to SD, if ARTIQ already running and connected)
 artiq_coremgmt config write -f boot result/boot.bin
 artiq_coremgmt reboot
-# reboot via power supply
 artiq_rtiomap dev_map.bin
 artiq_coremgmt config write -f device_map dev_map.bin
 ```
@@ -98,10 +98,9 @@ you can use this book's pages, or if there is no instruction for testing your ha
 
 ## Master-satellite setups
 
-1. Change `base` in JSON to the respective `master` or `satellite`, add `"enable_sata_drtio": true` if needed to the master,
+1. Change `base` in JSON to the respective `master` or `satellite`, remove `core_addr` in satellites
-   remove `core_addr` in satellites
 2. Build and flash firmware for each crate with JSONs (see instructions above)
-3. Create composed `device_db.py`: e.g. `artiq_ddb_template -o device_db.py -s 1 <satellite1>.json -s 2 <satellite2>.json <master>.json`
+3. Create combined `device_db.py`: e.g. `artiq_ddb_template -o device_db.py -s 1 <satellite1>.json -s 2 <satellite2>.json <master>.json`
 4. Connect satellite crates to the master respective to their numbers via the fiber (see example picture)
    ![](img/master_sat_connection.jpg)
 5. Ethernet is needed only for master

src/hw/clocker.md

@@ -36,7 +36,7 @@ Here is example setup for SynthNV RF signal generator:
    ![](../img/clocker_ref.jpg)
 4. Connect the Clocker's SMA output to the Kasli's `CLK`/`CLK IN` SMA pin
 5. After assembling the crates and flashing the firmware, start Kasli and set config if needed:
-   `artiq_coremgmt config write -s rtio_clock ext0_bypass`. Please refer to the [official manual](https://m-labs.hk/artiq/manual/installing.html#miscellaneous-configuration-of-the-core-device)
+   `artiq_coremgmt config write -s rtio_clock ext0_bypass`. Please refer to the [official manual](https://m-labs.hk/artiq/manual/core_device.html#clocking)
    for the details and available options. In most cases you may skip this step.
 6. Reboot either via `artiq_coremgmt reboot` or via power supply if the board's firmware doesn't have such command
 

src/hw/mirny_almazny.md

@@ -8,9 +8,10 @@
 ```json
 {
   "type": "mirny",
-  "almazny": true, // for mirny with almazny only 
+  "almazny": true, // for mirny with almazny only
+  "almazny_hw_rev": "v1.2", // optional, must be provided for legacy (<=v1.1) Almazny
   "ports": [<port num>],
-  "clk_sel": 2, // optional
+  "clk_sel": "mmcx", // optional
   "refclk": 125e6 // optional
 }
 ```

src/hw/stabilizer.md

@@ -62,7 +62,7 @@ With newer firmware with USB serial console:
 
 1. Connect the Stabilizer to power.
 2. Connect USB cable to the Stabilizer.
-3. Connect with a serial console emulator, usually at ``/dev/ttyACM0``.
+3. Run ``python -m serial /dev/ttyACM0`` to connect the serial port using ``pyserial``.
 4. Input ``platform dfu`` in the console.
 
 And for both:

src/hw/zotino_fastino.md

@@ -16,6 +16,7 @@
 {
   "type": "fastino",
   "hw_rev": "v1.2", // optional
+  "log2_width": <0 to 5, default 0>, // pack multiple (in powers of 2) DAC channels into one RTIO write
   "ports": [<port num>]
 }
 ```

src/sw_sup/afws_client.md

@@ -91,8 +91,7 @@ After you received credentials from us, we strongly recommend changing the passw
 `afws_client <username> passwd` command. This command will ask you for existing password and new desired password.
 
 The passwords are stored in a hashed way (i.e. cannot be decrypted back), however it's your responsibility to choose good passwords.
-Just keep in mind, that password may contain only alpha-numeric symbols and underscore `[a-zA-Z0-9_]`. If it contains other symbols,
+Just keep in mind, that password may contain only alpha-numeric symbols and underscore `[a-zA-Z0-9_]`.
-they may be silently ignored and you will not be able to log in.
 If you cannot login, we may reset your password if you email us at helpdesk.
 
 #### Get variants

src/sw_sup/artiq_start.md

@@ -18,7 +18,7 @@ Connect them in following order:
 By default standalone/master Carriers arrive with 192.168.1.75/24 set as their static address. Carrier will try to acquire this address
 from your router, and in case of failure, they will be just unavailable from the network. Check the following articles for troubleshooting network issues:
 * [Networking](networking.md)
-* [Official docs](https://m-labs.hk/artiq/manual/installing.html#setting-up-the-core-device-ip-networking)
+* [Official docs](https://m-labs.hk/artiq/manual/configuring.html)
 
 ## Run first experiment via artiq_run
 
@@ -32,7 +32,7 @@ In case your directory contains relevant `device_db` file, you may omit the `--d
 To check this, you may run `ls .` and check if it is in the list.
 
 On pre-installed NUCs, the ARTIQ commands are available everywhere, and you just need to run them.
-If you have Nix package manager or NixOS, you will just need to enter the shell with `nix develop github:m-labs/artiq\?ref=release-7`.
+If you have Nix package manager or NixOS, you will just need to enter the shell with `nix develop github:m-labs/artiq\?ref=release-8`.
 If you have installed ARTIQ with Conda, you will need to activate the environment with `conda activate <name of the environment with ARTIQ>`.
 
 You may check for experiments in the [official docs](https://m-labs.hk/artiq/manual/getting_started_core.html).

src/sw_sup/clocking.md

@@ -2,7 +2,7 @@
 
 This page describes ways to set up clocking. Official documentation references:
 
-* [Carrier configuration](https://m-labs.hk/artiq/manual/installing.html#miscellaneous-configuration-of-the-core-device)
+* [Carrier configuration](https://m-labs.hk/artiq/manual/core_device.html#clocking)
 * Devices' [available options](https://m-labs.hk/artiq/manual/core_drivers_reference.html), [Urukul example](https://m-labs.hk/artiq/manual/core_drivers_reference.html#artiq.coredevice.urukul.CPLD)
 
 In general, any RF card and Carriers require some clock source. Most of them have both internal clock signal generator

src/sw_sup/flashing_firmware.md

@@ -6,7 +6,7 @@ Here are some extra steps needed for flashing the firmware.
 
 ### Windows
 
-From the [official manual](https://m-labs.hk/artiq/manual/installing.html#configuring-openocd):
+From the [official manual](https://m-labs.hk/artiq/manual/flashing.html#installing-and-configuring-openocd):
 
 On Windows, a third-party tool, Zadig, is necessary. Use it as follows:
 1. Make sure the FPGA board’s JTAG USB port is connected to your computer.

src/sw_sup/moninj.md

@@ -3,7 +3,7 @@
 The official documentation lacks the description of MONitor/INJector, but it is a common mistake when running the ARTIQ-7.
 Basically it is a service that consists of two parts - one runs on the host PC, another on the Kasli.
 It allows to watch and control the state of the devices, so you can see it on the dashboard.
-That's why the dashboard may emit errors about not working moninj. To fix this, you just need [to run it with Kasli's IP](https://m-labs.hk/artiq/manual/utilities.html#moninj-proxy):
+That's why the dashboard may emit errors about not working moninj. To fix this, you just need [to run it with Kasli's IP](https://m-labs.hk/artiq/manual/utilities.html#module-artiq.frontend.aqctl_moninj_proxy):
 
 ```shell
 aqctl_moninj_proxy CORE_ADDRESS

src/sw_sup/pycharm.md

@@ -0,0 +1,17 @@
+# Integration with PyCharm®
+
+It's fairly possible to integrate PyCharm with ARTIQ on Windows.
+
+## MSYS2
+
+Below is an example configuration, change it according your installation.
+
+1. Set System Interpreter to MSYS2 CLANG64 one (pip packages are not supported):
+    ![](../img/win32/pycharm_interpreter.png)
+2. Set Terminal to use MSYS2 CLANG64 one:
+    ![](../img/win32/pycharm_terminal.png)
+
+After this you will be able to look up definitions from ARTIQ and use convenient integrated Terminal to run `artiq_run`.
+
+
+_PyCharm is a registered trademark of JetBrains s.r.o.. For license information, please refer to the JetBrains website or the product documentation._