forked from M-Labs/artiq
49 lines
1.1 KiB
Rust
49 lines
1.1 KiB
Rust
#![no_std]
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#![feature(llvm_asm)]
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extern crate byteorder;
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#[cfg(feature = "log")]
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extern crate log;
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#[cfg(feature = "smoltcp")]
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extern crate smoltcp;
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#[cfg(target_arch = "riscv32")]
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#[path = "riscv32/mod.rs"]
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mod arch;
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#[cfg(target_arch = "riscv32")]
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extern crate riscv;
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pub use arch::*;
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include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs"));
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include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs"));
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#[cfg(has_dfii)]
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include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/sdram_phy.rs"));
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#[cfg(has_dfii)]
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pub mod sdram;
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pub mod ident;
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pub mod clock;
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#[cfg(has_uart)]
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pub mod uart;
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#[cfg(has_spiflash)]
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pub mod spiflash;
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pub mod config;
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#[cfg(feature = "uart_console")]
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#[macro_use]
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pub mod uart_console;
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#[cfg(all(feature = "uart_console", feature = "log"))]
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#[macro_use]
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pub mod uart_logger;
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#[cfg(all(has_ethmac, feature = "smoltcp"))]
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pub mod ethmac;
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pub mod i2c;
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#[cfg(soc_platform = "kasli")]
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pub mod i2c_eeprom;
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#[cfg(all(soc_platform = "kasli", hw_rev = "v2.0"))]
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pub mod io_expander;
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#[cfg(all(has_ethmac, feature = "smoltcp"))]
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pub mod net_settings;
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#[cfg(has_slave_fpga_cfg)]
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pub mod slave_fpga;
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