artiq/artiq/examples
2024-05-28 13:51:11 +08:00
..
kasli core: add trigger_analyzer_proxy API 2023-12-13 13:08:54 +08:00
kasli_drtioswitching core: add trigger_analyzer_proxy API 2023-12-13 13:08:54 +08:00
kasli_shuttler update hw_rev in shuttler json example 2024-05-28 13:51:11 +08:00
kasli_suservo core: add trigger_analyzer_proxy API 2023-12-13 13:08:54 +08:00
kc705_nist_clock core: add trigger_analyzer_proxy API 2023-12-13 13:08:54 +08:00
no_hardware example: expand interactive 2024-03-26 15:35:58 +08:00
artiq_ipython_notebook.ipynb master: shorten RPC target names 2024-02-27 15:24:43 +08:00
fit_image.py ship examples with package 2016-04-05 13:59:39 +08:00
README.rst examples: Add README 2019-12-17 13:35:19 +00:00
remote_exec_controller.py use sipyco (#585) 2019-11-10 15:55:17 +08:00

ARTIQ experiment examples
=========================

This directory contains several sample ARTIQ master configurations
and associated experiments that illustrate basic usage of various
hardware and software features.

New users might want to peruse the ``no_hardware`` directory to
explore the argument/dataset machinery without needing access to
hardware, and the ``kc705_nist_clock`` directory for inspiration
on how to coordinate between host and FPGA core device code.