forked from M-Labs/artiq
9dfe9c1248
This commit moves DMA serialization code to the kernel CPU (to cope with the existence of rtio_output_wide) and batches the resulting sequences. This results in less data being transferred between kernel and comms CPUs (24 octets with one pointer before, 18 octets with no pointers now, for the common case of rtio_output), but most importantly reduces cache flushes, which now happen once per 64k octets. On average, it now takes about 15us to record a single RTIO event in a DMA trace. Fixes #712. |
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.. | ||
compiler | ||
coredevice | ||
libartiq_support | ||
lit | ||
__init__.py | ||
hardware_testbench.py | ||
not.py | ||
test_coefficients.py | ||
test_ctlmgr.py | ||
test_h5types.py | ||
test_korad_ka3005p.py | ||
test_lda.py | ||
test_novatech409b.py | ||
test_pc_rpc.py | ||
test_pdq2.py | ||
test_pipe_ipc.py | ||
test_scheduler.py | ||
test_serialization.py | ||
test_sync_struct.py | ||
test_thorlabs_tcube.py | ||
test_wavesynth.py | ||
test_worker.py |