Sebastien Bourdeauducq 8e391e2661 kc705: generate 10MHz clock on GPIO SMA ... For SynthNV and input tests.		2015-07-28 18:56:47 +08:00
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artiq_kc705.py	kc705: generate 10MHz clock on GPIO SMA	2015-07-28 18:56:47 +08:00
artiq_pipistrello.py	Revert "pipistrello: use 4x serdes for rtio ttl"	2015-07-27 23:39:35 -06:00