forked from M-Labs/artiq
72 lines
2.0 KiB
Python
72 lines
2.0 KiB
Python
import sys
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from pythonparser import diagnostic
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from artiq.language.core import *
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from artiq.language.types import *
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from artiq.language.units import *
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from artiq.compiler import Stitcher, Module
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from artiq.compiler.targets import OR1KTarget
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# Import for side effects (creating the exception classes).
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from artiq.coredevice import exceptions
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class CompileError(Exception):
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pass
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@syscall
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def rtio_get_counter() -> TInt64:
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raise NotImplementedError("syscall not simulated")
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class Core:
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def __init__(self, dmgr, ref_period=8*ns, external_clock=False):
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self.comm = dmgr.get("comm")
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self.ref_period = ref_period
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self.external_clock = external_clock
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self.first_run = True
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self.core = self
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self.comm.core = self
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def compile(self, function, args, kwargs, with_attr_writeback=True):
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try:
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engine = diagnostic.Engine(all_errors_are_fatal=True)
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stitcher = Stitcher(engine=engine)
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stitcher.stitch_call(function, args, kwargs)
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stitcher.finalize()
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module = Module(stitcher)
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target = OR1KTarget()
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library = target.compile_and_link([module])
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stripped_library = target.strip(library)
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return stitcher.object_map, stripped_library, \
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lambda addresses: target.symbolize(library, addresses)
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except diagnostic.Error as error:
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raise CompileError() from error
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def run(self, function, args, kwargs):
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object_map, kernel_library, symbolizer = self.compile(function, args, kwargs)
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if self.first_run:
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self.comm.check_ident()
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self.comm.switch_clock(self.external_clock)
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self.first_run = False
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self.comm.load(kernel_library)
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self.comm.run()
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self.comm.serve(object_map, symbolizer)
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@kernel
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def get_rtio_counter_mu(self):
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return rtio_get_counter()
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@kernel
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def break_realtime(self):
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at_mu(rtio_get_counter() + 125000)
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