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artiq
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artiq
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artiq
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dhslichter
f395a630e0
Updated qc2 pinouts for SPI and 2x DDS bus, update docs
2016-04-13 18:38:34 +08:00
..
__init__.py
package everything to rebuild core device binaries
2015-11-09 10:47:14 +08:00
kc705.py
Updated qc2 pinouts for SPI and 2x DDS bus, update docs
2016-04-13 18:38:34 +08:00
pipistrello.py
pipistrello: sys_clk 83 -> 75 MHz
2016-03-21 13:47:32 +01:00